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Received: from DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) by DB8PR04MB6890.eurprd04.prod.outlook.com (2603:10a6:10:117::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5417.26; Tue, 12 Jul 2022 08:20:19 +0000 Received: from DU0PR04MB9417.eurprd04.prod.outlook.com ([fe80::fdd4:8557:334b:180d]) by DU0PR04MB9417.eurprd04.prod.outlook.com ([fe80::fdd4:8557:334b:180d%7]) with mapi id 15.20.5417.026; Tue, 12 Jul 2022 08:20:19 +0000 From: "Peng Fan (OSS)" To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, l.stach@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, laurent.pinchart@ideasonboard.com, marex@denx.de, paul.elder@ideasonboard.com, aford173@gmail.com, Markus.Niebel@ew.tq-group.com, alexander.stein@ew.tq-group.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, aisheng.dong@nxp.com, Peng Fan Subject: [PATCH 2/6] dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl Date: Tue, 12 Jul 2022 16:21:42 +0800 Message-Id: <20220712082146.1192215-3-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220712082146.1192215-1-peng.fan@oss.nxp.com> References: <20220712082146.1192215-1-peng.fan@oss.nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SG2PR06CA0217.apcprd06.prod.outlook.com (2603:1096:4:68::25) To DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9de3ac79-68c6-46dd-79ea-08da63df5bc7 X-MS-TrafficTypeDiagnostic: DB8PR04MB6890:EE_ X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Peng Fan --- .../soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml | 17 ++++++++++++++--- include/dt-bindings/power/imx8mp-power.h | 4 ++++ 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml index 26487daa64d9..edbd267cdd67 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml @@ -4,20 +4,22 @@ $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: NXP i.MX8MM VPU blk-ctrl +title: NXP i.MX8MM/P VPU blk-ctrl maintainers: - Lucas Stach description: - The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to + The i.MX8MM/P VPU blk-ctrl is a top-level peripheral providing access to the NoC and ensuring proper power sequencing of the VPU peripherals located in the VPU domain of the SoC. properties: compatible: items: - - const: fsl,imx8mm-vpu-blk-ctrl + - enum: + - fsl,imx8mm-vpu-blk-ctrl + - fsl,imx8mp-vpu-blk-ctrl - const: syscon reg: @@ -47,6 +49,15 @@ properties: - const: g2 - const: h1 + interconnects: + maxItems: 3 + + interconnect-names: + items: + - const: g1 + - const: g2 + - const: h1 + required: - compatible - reg diff --git a/include/dt-bindings/power/imx8mp-power.h b/include/dt-bindings/power/imx8mp-power.h index 14b9c5ac9c82..11d43fc7a18e 100644 --- a/include/dt-bindings/power/imx8mp-power.h +++ b/include/dt-bindings/power/imx8mp-power.h @@ -52,4 +52,8 @@ #define IMX8MP_HDMIBLK_PD_HDCP 7 #define IMX8MP_HDMIBLK_PD_HRV 8 +#define IMX8MP_VPUBLK_PD_G1 0 +#define IMX8MP_VPUBLK_PD_G2 1 +#define IMX8MP_VPUBLK_PD_H1 2 + #endif -- 2.25.1