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[88.93.169.171]) by smtp.gmail.com with ESMTPSA id v14-20020ac2560e000000b0047fae90bfb4sm2083581lfd.56.2022.07.12.02.40.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 12 Jul 2022 02:40:36 -0700 (PDT) Message-ID: Date: Tue, 12 Jul 2022 11:40:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH 1/3] dt-bindings: clk: meson: add S4 SoC clock controller bindings Content-Language: en-US To: Yu Tu , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Neil Armstrong , Jerome Brunet , Kevin Hilman , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Martin Blumenstingl References: <20220708062757.3662-1-yu.tu@amlogic.com> <20220708062757.3662-2-yu.tu@amlogic.com> From: Krzysztof Kozlowski In-Reply-To: <20220708062757.3662-2-yu.tu@amlogic.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/07/2022 08:27, Yu Tu wrote: > Add new clock controller compatible and dt-bindings header for the > Everything-Else domain of the S4 SoC. > > Signed-off-by: Yu Tu > --- > .../bindings/clock/amlogic,gxbb-clkc.txt | 1 + > MAINTAINERS | 1 + > include/dt-bindings/clock/s4-clkc.h | 354 ++++++++++++++++++ > 3 files changed, 356 insertions(+) > create mode 100644 include/dt-bindings/clock/s4-clkc.h > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt > index 7ccecd5c02c1..301b43dea912 100644 > --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt > +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt > @@ -12,6 +12,7 @@ Required Properties: > "amlogic,g12a-clkc" for G12A SoC. > "amlogic,g12b-clkc" for G12B SoC. > "amlogic,sm1-clkc" for SM1 SoC. > + "amlogic,s4-clkc" for S4 SoC. > - clocks : list of clock phandle, one for each entry clock-names. > - clock-names : should contain the following: > * "xtal": the platform xtal > diff --git a/MAINTAINERS b/MAINTAINERS > index c1abc53f9e91..e4ca46c5c8a1 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1775,6 +1775,7 @@ F: Documentation/devicetree/bindings/clock/amlogic* > F: drivers/clk/meson/ > F: include/dt-bindings/clock/gxbb* > F: include/dt-bindings/clock/meson* > +F: include/dt-bindings/clock/s* > > ARM/Amlogic Meson SoC Crypto Drivers > M: Corentin Labbe > diff --git a/include/dt-bindings/clock/s4-clkc.h b/include/dt-bindings/clock/s4-clkc.h > new file mode 100644 > index 000000000000..8b46d54d79fe > --- /dev/null > +++ b/include/dt-bindings/clock/s4-clkc.h > @@ -0,0 +1,354 @@ > +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ > +/* > + * Copyright (c) 2021 Amlogic, Inc. All rights reserved. > + * Author: Yu Tu > + */ > + > +#ifndef __S4_CLKC_H > +#define __S4_CLKC_H Use header guards mathcing paths. See other files for examples. > + > +/* > + * CLKID index values > + */ > + > +#define CLKID_PLL_BASE 0 > +#define CLKID_FIXED_PLL_DCO (CLKID_PLL_BASE + 0) Drop CLKID_PLL_BASE > +#define CLKID_FIXED_PLL (CLKID_PLL_BASE + 1) ditto... and so on. Best regards, Krzysztof