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Date:   Tue, 12 Jul 2022 10:00:10 -0400
From:   =?utf-8?B?TsOtY29sYXMgRi4gUi4gQS4=?= Prado 
        <nfraprado@collabora.com>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
Cc:     Chen-Yu Tsai <wenst@chromium.org>, Stephen Boyd <sboyd@kernel.org>,
        kernel@collabora.com, Chun-Jie Chen <chun-jie.chen@mediatek.com>,
        Ikjoon Jang <ikjn@chromium.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Miles Chen <miles.chen@mediatek.com>,
        Ran Jianping <ran.jianping@zte.com.cn>,
        Weiyi Lu <weiyi.lu@mediatek.com>,
        linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org
Subject: Re: [PATCH] clk: mediatek: Don't check HW status for mt8192/5's
 imp_iic_wrap clocks
Message-ID: <20220712140010.nfxo42td3zzy3iqp@notapiano>
References: <20220711205733.203963-1-nfraprado@collabora.com>
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 <473aa749-fcfe-bd38-0d83-95375aeef8a3@collabora.com>
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On Tue, Jul 12, 2022 at 12:57:47PM +0200, AngeloGioacchino Del Regno wrote:
> Il 12/07/22 12:56, Chen-Yu Tsai ha scritto:
> > On Tue, Jul 12, 2022 at 6:55 PM AngeloGioacchino Del Regno
> > <angelogioacchino.delregno@collabora.com> wrote:
> > > 
> > > Il 12/07/22 12:44, Chen-Yu Tsai ha scritto:
> > > > Hi,
> > > > 
> > > > On Tue, Jul 12, 2022 at 4:57 AM N?colas F. R. A. Prado
> > > > <nfraprado@collabora.com> wrote:
> > > > > 
> > > > > The imp_iic_wrap clocks on mt8192/mt8195 require that the i2c_sel parent
> > > > > clock be enabled before their hardware status can be checked. Since this
> > > > > wasn't taken into account, reading from the clk_summary debugfs file
> > > > > would cause the system to completely freeze.
> > > > > 
> > > > > Assuming that this clock is managed only by the kernel, and not by any
> > > > > firmware, simply drop the is_enabled() optional callback and instead
> > > > > rely on the enable count for the imp_iic_wrap clocks.
> > > > 
> > > > That's the wrong way to go about it.
> > > > 
> > > > The I2C clocks already have the CLK_OPS_PARENT_ENABLE flag set. So the
> > > > issue is that somewhere in the clk core, a piece of code is not honoring
> > > > that flag.
> > > > 
> > > > And it seems that's in more than one place.
> > > > 
> > > 
> > > Uhm, you're right. I gave my Tested-by, but not a Reviewed-by because I
> > > wasn't really convinced about this solution being the best.
> > > 
> > > Now that I think of it, the solution may be as simple as:
> > > 
> > > clk.c
> > > 
> > > static bool clk_core_is_enabled(struct clk_core *core)
> > > {
> > >          bool ret = false;
> > > 
> > >          /*
> > >           * If this clock needs parent enabled, but its parent is
> > >           * off, we directly return false for two reasons:
> > >           * 1. This clock being enabled would be impossible
> > >           * 2. The platform may crash for unclocked access while
> > >           *    reading the status of this clock (where a .is_enabled
> > >           *    callback is provided).
> > >           */
> > >          if (core->flags & CLK_OPS_PARENT_ENABLE &&
> > >              !clk_core_is_enabled(core->parent))
> > >                  return false;
> > > 
> > >          ... etc etc etc ...
> > > }
> > > 
> > > N?colas, did you try this approach?

From reading the core clock code, it's mentioned that CLK_OPS_PARENT_ENABLE is
used "during gate/ungate, set rate and re-parent", there's no mention of
"checking the gate state", so I assumed this operation was intentionally not
handled by this flag. That's why I went for this solution.

But from the discussion sounds like the flag should indeed be caring about the
is_enabled() operation as well, so let's go with Chen-Yu's patch.

Thanks,
N?colas

> > 
> > I have a patch ready, but I got distracted by other stuff today.
> > 
> 
> Let's just wait for your patch then, seems like being the most sensible option.
> 
> Cheers!