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Date:   Tue, 12 Jul 2022 16:44:25 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Frank <Frank.Sae@motor-comm.com>
Cc:     Peter Geis <pgwipeout@gmail.com>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        "David S . Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>, yinghong.zhang@motor-comm.com,
        fei.zhang@motor-comm.com, hua.sun@motor-comm.com,
        netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] net: phy: Add driver for Motorcomm yt8521 gigabit
 ethernet
Message-ID: <Ys2IyaI2u2iLL0g6@lunn.ch>
References: <20220711103706.709-1-Frank.Sae@motor-comm.com>
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On Mon, Jul 11, 2022 at 06:37:06PM +0800, Frank wrote:
> patch v3:
>  Hi Andrew
>  Thanks and based on your comments we modified the patch as below.
>  
> > It is generally not that simple. Fibre, you probably want 1000BaseX,
> > unless the fibre module is actually copper, and then you want
> > SGMII. So you need something to talk to the fibre module and ask it
> > what it is. That something is phylink. Phylink does not support both
> > copper and fibre at the same time for one MAC.
> 
>  yes, you said it and for MAC, it does not support copper and Fiber at same time.
>  but from Physical Layer, you know, sometimes both Copper and Fiber cables are
>  connected. in this case, Phy driver should do arbitration and report to MAC
>  which media should be used and Link-up.
>  This is the reason that the driver has a "polling mode", and by default, also
>  this driver takes fiber as first priority which matches phy chip default behavior.

The Marvell 10G driver is another PHY which can be used for both
Copper and Fibre. In order to do this, it has a few extra functions:

static int mv3310_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
{
        struct phy_device *phydev = upstream;
        __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
        phy_interface_t iface;

        sfp_parse_support(phydev->sfp_bus, id, support);
        iface = sfp_select_interface(phydev->sfp_bus, support);

        if (iface != PHY_INTERFACE_MODE_10GBASER) {
                dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n");
                return -EINVAL;
        }
        return 0;
}

static const struct sfp_upstream_ops mv3310_sfp_ops = {
        .attach = phy_sfp_attach,
        .detach = phy_sfp_detach,
        .module_insert = mv3310_sfp_insert,
};

Also see the at803x driver.

This allows the PHY to report to phylink what it is doing, and to
determine the host side interface mode. I would expect this driver to
implement sfp_upstream_ops as well.

	  Andrew