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[35.230.65.123]) by smtp.gmail.com with ESMTPSA id s19-20020a656453000000b00411acdb1625sm6453536pgv.92.2022.07.12.12.14.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Jul 2022 12:14:11 -0700 (PDT) Date: Tue, 12 Jul 2022 19:14:08 +0000 From: Sean Christopherson To: Martin Fernandez Cc: Kai Huang , linux-kernel@vger.kernel.org, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, mingo@redhat.com, tglx@linutronix.de, kirill.shutemov@linux.intel.com, daniel.gutson@eclypsium.com, hughsient@gmail.com, alex.bazhaniuk@eclypsium.com Subject: Re: [PATCH v2] x86/cpuinfo: Clear X86_FEATURE_TME if TME/MKTME is disabled by BIOS Message-ID: References: <20220704142250.1512726-1-martin.fernandez@eclypsium.com> <8d2a3175be8a3aff1d3fc535dd9ab6217cfe1e66.camel@intel.com> <07ff13d590cf290a14232fb113ff4183a6fa352d.camel@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-17.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,USER_IN_DEF_DKIM_WL,USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 12, 2022, Martin Fernandez wrote: > On 7/11/22, Kai Huang wrote: > > > >> > >> > This patch basically tries to fix the issue that TME flag isn't cleared > >> > when TME > >> > is disabled by BIOS. And fir this purpose, the code change in this > >> > patch looks > >> > reasonable to me. Unless I am mistaken, detect_tme() will be called for > >> > all > >> > cpus if TME is supported in CPUID but isn't enabled by BIOS (either > >> > LOCKED or > >> > ENABLED bit isn't set). > >> > >> But this patch doesn't handle the bypass bit, which _does_ effectively > >> disable > >> TME when set. E.g. the MKTME spec says: > >> > >> Software must inspect the Hardware Encryption Enable (bit 1) and TME > >> Encryption > >> Bypass Enable (bit 31) to determine if TME encryption is enabled. > > > > Yeah so my original reply said: > > > > "But perhaps it's arguable whether we can also clear TME flag in this > > case." > > > > And I only gave my Acked-by. > > > > It completely depends on the purpose of this patch, or what does this patch > > claim to do. If it only claims to clear TME bit if BIOS doesn't enable it, > > then > > looks fine to me. If it wants to achieve "clear TME feature flag if > > encryption > > isn't active", then yes you are right. > > > > But as I said perhaps "whether we should clear TME flag when bypass is > > enabled" > > is arguable. After all, what does TME flag in /proc/cpuinfo imply? > > > > What we want with this patch is to check whether some kind of memory > encryption is active. Right now we are doing it by checking the "tme > active in BIOS" log, so we are not checking the bypass. > > Can you change this bypass bit at runtime? ie, does it make sense to > check it only once at boot time? No, the MSR has write-once behavior. The LOCK bit is set on the first succesful WRMSR (or amusingly, on the first SMI). > If no, then maybe it's ok to check that bit in detect_tme and consider > it for cpuinfo, > > If it can change, then probably it's ok to leave this patch as is, and > for our use case maybe we can add a sysfs file that reads that msr.