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Date:   Tue, 12 Jul 2022 12:37:38 -0700 (PDT)
From:   matthew.gerlach@linux.intel.com
To:     Marco Pagani <marpagan@redhat.com>
cc:     basheer.ahmed.muddebihal@intel.com, corbet@lwn.net,
        hao.wu@intel.com, linux-doc@vger.kernel.org,
        linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
        mdf@kernel.org, russell.h.weight@intel.com,
        tianfei.zhang@intel.com, trix@redhat.com, yilun.xu@intel.com
Subject: Re: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001
 and C6100 cards
In-Reply-To: <23a5d310-7d5e-a8ee-bd66-b80505e0553e@redhat.com>
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References: <20220707150549.265621-3-matthew.gerlach@linux.intel.com> <23a5d310-7d5e-a8ee-bd66-b80505e0553e@redhat.com>
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On Tue, 12 Jul 2022, Marco Pagani wrote:

> On 2022-07-07 17:05, matthew.gerlach@linux.intel.com wrote:
>> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>>
>> Add pci_dev_table entries supporting the Intel N6000, N6001
>> and C6100 cards to the dfl-pci driver.
>>
>> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>> Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
>
> Tested-by: Marco Pagani <marpagan@redhat.com>

Thanks for testing.

Matthew
>
>> ---
>> v3: added necessary subdevice ids
>>     removed 'drivers: ' from title
>>
>> v2: changed names from INTEL_OFS to INTEL_DFL
>> ---
>>  drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++
>>  1 file changed, 19 insertions(+)
>>
>> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
>> index fd1fa55c9113..94eabdf1d2f7 100644
>> --- a/drivers/fpga/dfl-pci.c
>> +++ b/drivers/fpga/dfl-pci.c
>> @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
>>  #define PCIE_DEVICE_ID_INTEL_PAC_D5005		0x0B2B
>>  #define PCIE_DEVICE_ID_SILICOM_PAC_N5010	0x1000
>>  #define PCIE_DEVICE_ID_SILICOM_PAC_N5011	0x1001
>> +#define PCIE_DEVICE_ID_INTEL_DFL		0xbcce
>>
>>  /* VF Device */
>>  #define PCIE_DEVICE_ID_VF_INT_5_X		0xBCBF
>>  #define PCIE_DEVICE_ID_VF_INT_6_X		0xBCC1
>>  #define PCIE_DEVICE_ID_VF_DSC_1_X		0x09C5
>>  #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF	0x0B2C
>> +#define PCIE_DEVICE_ID_INTEL_DFL_VF		0xbccf
>> +
>> +/* PCI Subdevice ID */
>> +#define PCIE_SUBDEVICE_ID_INTEL_N6000		0x1770
>> +#define PCIE_SUBDEVICE_ID_INTEL_N6001		0x1771
>> +#define PCIE_SUBDEVICE_ID_INTEL_C6100		0x17d4
>>
>>  static struct pci_device_id cci_pcie_id_tbl[] = {
>>  	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),},
>> @@ -96,6 +103,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = {
>>  	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),},
>>  	{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},
>>  	{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},
>> +	{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
>> +			PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
>> +	{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
>> +			PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
>> +	{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
>> +			PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
>> +	{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
>> +			PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
>> +	{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
>> +			PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
>> +	{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
>> +			PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
>>  	{0,}
>>  };
>>  MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);
>
>