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Wysocki" Subject: RE: [PATCH v3 04/13] cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu_init() Thread-Topic: [PATCH v3 04/13] cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu_init() Thread-Index: AQHYlgW7jGCzqcEoDESeugEQOhJ+Xa17xlgAgAAHarA= Date: Wed, 13 Jul 2022 05:57:22 +0000 Message-ID: References: <001d002ba93580763421c712247bf8d9faa67756.1657638462.git.Perry.Yuan@amd.com> <20220713052708.2paskxzl6s32j4yd@vireshk-i7> In-Reply-To: <20220713052708.2paskxzl6s32j4yd@vireshk-i7> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_Enabled=true; MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_SetDate=2022-07-13T05:57:20Z; MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_Method=Standard; MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_Name=General; MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_SiteId=3dd8961f-e488-4e60-8e11-a82d994e183d; MSIP_Label_4342314e-0df4-4b58-84bf-38bed6170a0f_ActionId=a1c881c3-5ec9-464c-af6f-ba5e58a7fbd9; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5278.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 69ebccc6-7f0d-407f-b979-08da64948e04 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Jul 2022 05:57:22.6646 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: nggONn1vKx5y/VJmUiWdbtQg9RVNOeEgY810nnkTex5+UPhKNXRQ02Z8kFez3KhXmJkp2+c0GmejIhsIoR53fw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4566 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [AMD Official Use Only - General] Hi Viresh, > -----Original Message----- > From: Viresh Kumar > Sent: Wednesday, July 13, 2022 1:27 PM > To: Yuan, Perry > Cc: rafael.j.wysocki@intel.com; Huang, Ray ; Sharma, > Deepak ; Limonciello, Mario > ; Fontenot, Nathan > ; Deucher, Alexander > ; Su, Jinzhou (Joe) ; > Huang, Shimmer ; Du, Xiaojian > ; Meng, Li (Jassmine) ; linux- > pm@vger.kernel.org; linux-kernel@vger.kernel.org; Rafael J. Wysocki > > Subject: Re: [PATCH v3 04/13] cpufreq: amd-pstate: prefetch > cppc_req_cached value in amd_pstate_cpu_init() >=20 > [CAUTION: External Email] >=20 > On 12-07-22, 11:40, Perry Yuan wrote: > > This cppc_req_cached valued should be prefetched during > > amd_pstate_cpu_init call period, then the amd_pstate_update() will get > > correct cached value before updating the perf to change the cpu perf > > level. >=20 > You are doing more than this in the patch, either mention all the stuff w= ith > reasoning or split into two patches. My mistakes, the patch adds the shared_mem check which is added by another = patch which is in the coming EPP driver patch set. I will add one more pat= ch to introduce what shared_mem is used for in V4 later.=20 Thank you! Perry.=20 >=20 > > Signed-off-by: Perry Yuan > > --- > > drivers/cpufreq/amd-pstate.c | 15 ++++++++++----- > > 1 file changed, 10 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/cpufreq/amd-pstate.c > > b/drivers/cpufreq/amd-pstate.c index 43e6df9f67f6..e4904da54541 100644 > > --- a/drivers/cpufreq/amd-pstate.c > > +++ b/drivers/cpufreq/amd-pstate.c > > @@ -547,12 +547,17 @@ static int amd_pstate_cpu_init(struct > cpufreq_policy *policy) > > cpudata->lowest_nonlinear_freq =3D lowest_nonlinear_freq; > > > > policy->driver_data =3D cpudata; > > + if (!shared_mem) { >=20 > This is a new change, which the commit log doesn't talk about. >=20 > > + ret =3D rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, > &value); > > + if (ret) > > + return ret; > > + WRITE_ONCE(cpudata->cppc_hw_conf_cached, value); > > > > - ret =3D rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value); > > - if (ret) > > - return ret; > > - WRITE_ONCE(cpudata->cppc_hw_conf_cached, value); > > - > > + ret =3D rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &va= lue); > > + if (ret) > > + return ret; > > + WRITE_ONCE(cpudata->cppc_req_cached, value); > > + } > > amd_pstate_boost_init(cpudata); > > > > return 0; > > -- > > 2.25.1 >=20 > -- > viresh