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From:   Robert Marko <robimarko@gmail.com>
Date:   Wed, 13 Jul 2022 13:08:10 +0200
Message-ID: <CAOX2RU5RX+H=omuKGye2fBy9dOFmfC9HC_3pekeGMxDJuReCUw@mail.gmail.com>
Subject: Re: [PATCH] pinctrl: qcom: spmi-gpio: make the irqchip immutable
To:     Marc Zyngier <maz@kernel.org>
Cc:     Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Andy Gross <agross@kernel.org>,
        Linus Walleij <linus.walleij@linaro.org>,
        linux-arm-msm <linux-arm-msm@vger.kernel.org>,
        linux-gpio@vger.kernel.org,
        open list <linux-kernel@vger.kernel.org>
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On Tue, 12 Jul 2022 at 17:12, Marc Zyngier <maz@kernel.org> wrote:
>
> On Tue, 12 Jul 2022 13:44:45 +0100,
> Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote:
> >
> > On Tue, Jul 12, 2022 at 11:42:32AM +0100, Marc Zyngier wrote:
> > > On Fri, 24 Jun 2022 20:51:12 +0100,
> > > Robert Marko <robimarko@gmail.com> wrote:
> > > >
> > > > Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> > > > immutable") added a warning to indicate if the gpiolib is altering the
> > > > internals of irqchips.
> > > >
> > > > Following this change the following warning is now observed for the SPMI
> > > > PMIC pinctrl driver:
> > > > gpio gpiochip1: (200f000.spmi:pmic@0:gpio@c000): not an immutable chip, please consider fixing it!
> > > >
> > > > Fix this by making the irqchip in the SPMI PMIC pinctrl driver immutable.
> > > >
> > > > Signed-off-by: Robert Marko <robimarko@gmail.com>
> > > > ---
> > > >  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 22 ++++++++++++----------
> > > >  1 file changed, 12 insertions(+), 10 deletions(-)
> > > >
> > > > diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > > index c3255b0bece4..406ee0933d0b 100644
> > > > --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > > +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > > @@ -171,7 +171,6 @@ struct pmic_gpio_state {
> > > >   struct regmap   *map;
> > > >   struct pinctrl_dev *ctrl;
> > > >   struct gpio_chip chip;
> > > > - struct irq_chip irq;
> > > >   u8 usid;
> > > >   u8 pid_base;
> > > >  };
> > > > @@ -988,6 +987,17 @@ static void *pmic_gpio_populate_parent_fwspec(struct gpio_chip *chip,
> > > >   return fwspec;
> > > >  }
> > > >
> > > > +static const struct irq_chip spmi_gpio_irq_chip = {
> > > > + .name           = "spmi-gpio",
> > > > + .irq_ack        = irq_chip_ack_parent,
> > > > + .irq_mask       = irq_chip_mask_parent,
> > > > + .irq_unmask     = irq_chip_unmask_parent,
> > >
> > > No, this is wrong. Please look at the documentation to see how you
> > > must now directly call into the gpiolib helpers for these two
> > > callbacks.
> > >
> >
> > IIUC, you are referring to gpiochip_disable_irq() and
> > gpiochip_enable_irq() APIs.
>
> I am indeed.
>
> > These APIs are supposed to let the gpiolib know about that the IRQ
> > usage of these GPIOs. But for the case of hierarchial IRQ domain,
> > isn't the parent is going to do that?
>
> Why would it? The parent has no clue about what sits above it. In a
> hierarchical configuration, each level is responsible for its own
> level, and the GPIO layer should be responsible for its own
> management.
>
> > Please correct me if I'm wrong.
>
> I'm afraid you are, and this patch is a fairly obvious change in
> behaviour, as the callbacks you mention above are not called anymore,
> while they were before.
>
> If they are not necessary (for reasons I can't fathom), then this
> should be clearly explained.

Hi Marc,
I will look at IRQ GPIO docs, but in this case, then we have more
conversions that
are not correct.

Regards,
Robert
>
> Thanks,
>
>         M.
>
> --
> Without deviation from the norm, progress is not possible.