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[88.207.98.197]) by smtp.googlemail.com with ESMTPSA id kw11-20020a170907770b00b006f3ef214e27sm5538254ejc.141.2022.07.13.15.52.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jul 2022 15:52:04 -0700 (PDT) From: Robert Marko To: linus.walleij@linaro.org, colin.foster@in-advantage.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH 2/2] pinctrl: ocelot: fix pinconf Date: Thu, 14 Jul 2022 00:51:51 +0200 Message-Id: <20220713225151.1476041-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220713225151.1476041-1-robert.marko@sartura.hr> References: <20220713225151.1476041-1-robert.marko@sartura.hr> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit "pinctrl: ocelot: convert pinctrl to regmap" moved to using regmap_read/write, however it neglected to also carry out alignment to register stride of 4. This would cause the following error: [ 1.720873] pinctrl-ocelot 6110101e0.pinctrl: pin_config_set op failed for pin 34 [ 1.728110] sdhci-sparx5 600800000.mmc: Error applying setting, reverse things back So, regmap_read would return -EINVAL as it was being passed address of the pin without stride, so for example pin 34 would end up being 0x22 in hex. Fix this by accouting for the stride in register address. Fixes: 076d9e71bcf8 ("pinctrl: ocelot: convert pinctrl to regmap") Signed-off-by: Robert Marko --- drivers/pinctrl/pinctrl-ocelot.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c index 84bfbe649b67..a71145367b15 100644 --- a/drivers/pinctrl/pinctrl-ocelot.c +++ b/drivers/pinctrl/pinctrl-ocelot.c @@ -1327,7 +1327,9 @@ static int ocelot_hw_get_value(struct ocelot_pinctrl *info, if (info->pincfg) { u32 regcfg; - ret = regmap_read(info->pincfg, pin, ®cfg); + ret = regmap_read(info->pincfg, + pin * regmap_get_reg_stride(info->pincfg), + ®cfg); if (ret) return ret; @@ -1359,14 +1361,18 @@ static int ocelot_pincfg_clrsetbits(struct ocelot_pinctrl *info, u32 regaddr, u32 val; int ret; - ret = regmap_read(info->pincfg, regaddr, &val); + ret = regmap_read(info->pincfg, + regaddr * regmap_get_reg_stride(info->pincfg), + &val); if (ret) return ret; val &= ~clrbits; val |= setbits; - ret = regmap_write(info->pincfg, regaddr, val); + ret = regmap_write(info->pincfg, + regaddr * regmap_get_reg_stride(info->pincfg), + val); return ret; } -- 2.36.1