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Date:   Wed, 13 Jul 2022 23:20:47 -0700
From:   Colin Foster <colin.foster@in-advantage.com>
To:     Robert Marko <robert.marko@sartura.hr>
Cc:     Linus Walleij <linus.walleij@linaro.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Horatiu Vultur <horatiu.vultur@microchip.com>
Subject: Re: [PATCH 2/2] pinctrl: ocelot: fix pinconf
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On Thu, Jul 14, 2022 at 01:07:24AM +0200, Robert Marko wrote:
> On Thu, Jul 14, 2022 at 1:01 AM Colin Foster <colin.foster@in-advantage.com>
> wrote:
> 
> > Hi Robert,
> >
> > On Thu, Jul 14, 2022 at 12:51:51AM +0200, Robert Marko wrote:
> > > Commit "pinctrl: ocelot: convert pinctrl to regmap" moved to using
> > > regmap_read/write, however it neglected to also carry out alignment
> > > to register stride of 4.
> > >
> > > This would cause the following error:
> > > [    1.720873] pinctrl-ocelot 6110101e0.pinctrl: pin_config_set op
> > failed for pin 34
> > > [    1.728110] sdhci-sparx5 600800000.mmc: Error applying setting,
> > reverse things back
> > >
> > > So, regmap_read would return -EINVAL as it was being passed address
> > > of the pin without stride, so for example pin 34 would end up being
> > > 0x22 in hex.
> > >
> > > Fix this by accouting for the stride in register address.
> >
> > Sorry for the bug. Horaitu found this as well and recently submitted
> > patches:
> >
> >
> > https://patchwork.ozlabs.org/project/linux-gpio/patch/20220713193750.4079621-3-horatiu.vultur@microchip.com/
> >
> > The second patch in his set fixes both of these issues (reg_stride and
> > max_register).
> >
> 
> Yeah, I noticed his patch only after sending this.
> Sorry for the noise.

It doesn't bother me. The only difference was your 0xfc for the max
register, while Horatiu's (per my suggestion) was info->desc->npins. 
Just pointing that out in case anyone wants to raise that as a sticking
point.

> 
> Regards,
> Robert
>