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From:   Arnd Bergmann <arnd@arndb.de>
Date:   Thu, 14 Jul 2022 22:19:51 +0200
Message-ID: <CAK8P3a25JH4=XdS_QRBdTpLhsLyc13XYjt9xq8FcXCNUf+DTiQ@mail.gmail.com>
Subject: Re: [PATCH] arm: ioremap: Fix compilation of code which use
 pci_remap_iospace() without CONFIG_MMU
To:     =?UTF-8?Q?Pali_Roh=C3=A1r?= <pali@kernel.org>
Cc:     kernel test robot <lkp@intel.com>, kbuild-all@lists.01.org,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Russell King <linux@armlinux.org.uk>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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On Thu, Jul 14, 2022 at 8:57 PM Pali Rohár <pali@kernel.org> wrote:
>
> Custom ARM version of pci_remap_iospace() is implemented only for MMU
> kernel builds. So do not define pci_remap_iospace() without CONFIG_MMU.
>
> See compilation failures:
> https://lore.kernel.org/r/202112040150.wvyJZIZO-lkp@intel.com/
> https://lore.kernel.org/r/202112261802.u9iXqdWh-lkp@intel.com/
> https://lore.kernel.org/r/202201131529.A2s7rKQc-lkp@intel.com/
> https://lore.kernel.org/r/202203090147.24cUL0De-lkp@intel.com/
>
> Fixes: bc02973a06a6 ("arm: ioremap: Implement standard PCI function pci_remap_iospace()")
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Pali Rohár <pali@kernel.org>
>
> ---
>
> PING!!!! Is somebody interested in fixing these compile errors? As nobody
> answered to my emails where I proposed this fix more than half year ago and
> asked for opinion...
>
> https://lore.kernel.org/r/20211204022131.bmhla4gkph7s7hy2@pali/
> https://lore.kernel.org/r/20211205123209.lyx76daqdwzqwex4@pali/
> https://lore.kernel.org/r/20211226215135.blcnafbuwhrq5ram@pali/
> https://lore.kernel.org/r/20220113134938.3tx7iiukphvazvsq@pali/
> https://lore.kernel.org/r/20220308184851.jmw2xvrapy5wzwof@pali/
>

Are you sure this still happens in mainline kernels? Since
commit 2f618d5ef5dd ("ARM: remove support for NOMMU ARMv4/v5")
it should no longer be possible to disable the MMU in any Arm machines
other than the Cortex-M based ones, which do not support PCI.

         Arnd