Received: by 2002:ad5:4acb:0:0:0:0:0 with SMTP id n11csp403699imw; Fri, 15 Jul 2022 05:39:55 -0700 (PDT) X-Google-Smtp-Source: AGRyM1sYJ/Bjt51vS87Fbj7IlnjKTAMdnQn2XB2ox9JcVByM9r8StBZovd8n2DrdKFzuX+NOCoeh X-Received: by 2002:a17:902:8b87:b0:16c:a263:f6d2 with SMTP id ay7-20020a1709028b8700b0016ca263f6d2mr9904621plb.150.1657888795302; Fri, 15 Jul 2022 05:39:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657888795; cv=none; d=google.com; s=arc-20160816; b=dAZQAoBbfP5CD17rZUDV6yuE585v0TxXfZFtxAnLCy1jwNqhyJslXoheghziM5qTNa Q0ArjMJnUTXZczU4IxA0DwhmiIDcH760Ng4Wk52uhPjcxV3iROa8A9RjnIZqiw7fGcC0 dOIlcEV4WV82ql1HhHJniKziYcG43XowloaRDytUPSq7vnNfYMxLIGEme/iHf3F2dIYX cEtEiBtrZP8h4dpeLdJTg7GM6O0Rkl8tCo5TXA7NzUpkdRAOiPM4qPmf6yLAv6oYdvzx /f1sqcMMAj1m0arWDWB8rawyqNsrihJPDyhLMqqCdMvJT9AdZjay+w2YO6MfhenHH5rw 2ftw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:cc:to:subject :message-id:date:from:in-reply-to:references:mime-version; bh=clX9mABsfSFjUKE5SXEQPullHlXsuT13AKMm2SwncRM=; b=qQK2NwWZIQFpnxq4SaKM9c7q7UYK73MQ3XSjmroTLBeh1/BfUvtebJieG0VNqsFIr2 pi4QfzYSNNOqXr2n32CmoCRpS8253T8TdFrVjzfE5qkaNLecD7uib3xBBxWFuKB1WM8V /pMkUKCkGhdRvdhBFrkI9YbM2KGjQYkMkOUtsj23DGJr3dqtgyQzvVzxtBoEfImdPfav 280zmIfYTS2KXFgDP9CefhG07xVYWJSueWyc122VS4jXv4wrzSQq8JNzac7P7nqZC8vA ndpQ6huvUpSDv3i7MMtlWU3hpBSnLWZ77eaDSSq/TNSwVRygVQ1a+oY1pHuIYe2P7ze9 eo9Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h16-20020a17090aa89000b001f0456e9547si4127142pjq.62.2022.07.15.05.39.38; Fri, 15 Jul 2022 05:39:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229908AbiGOMca convert rfc822-to-8bit (ORCPT + 99 others); Fri, 15 Jul 2022 08:32:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46692 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229525AbiGOMc3 (ORCPT ); Fri, 15 Jul 2022 08:32:29 -0400 Received: from mail-yw1-f169.google.com (mail-yw1-f169.google.com [209.85.128.169]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79D1713D65; Fri, 15 Jul 2022 05:32:28 -0700 (PDT) Received: by mail-yw1-f169.google.com with SMTP id 00721157ae682-31bf3656517so45209557b3.12; Fri, 15 Jul 2022 05:32:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=OjxnZb7meHcqrP1kpVMixA9ZvzRnaNtGWdUlQK9VV+M=; b=GNQt0nYETwGug4NvYtq1njmDLF2jzfDzbYnBo/R+pBumV2+qYNqIwcjYXDskUZ8rGo MjDWGSIu5xK5Wm2wEj0fGAWbH3qRn19N5aUNLMm58Tzxy+aBKJ2e/eISNklxr9FrQiDn MzqhJ+pqrAIAfzQrfvBGAlyxuo9dY2+Pakcw+d6jVKy/C35DGB1JfATEJ/6O3KQ4O14n JigHaXRwzcAx+YDzOnj3f5z45uDwiyR84HQTF55S4+kOfpt+g7zZESZf5p9hJZdzhpz+ 9KgLLLvxuAHwFK5pCWUdM1jcY2YDHAlCQ1uEG4lU2ids3x/8mPgLYgPwuNY/J+EtSbii P0RA== X-Gm-Message-State: AJIora+lv/3ZYlykD76T0vrdoNNKe/h5ePE2dNViWg8A6VAFtsKEKYEw OhSw+4OTeIcYe03SCKt2RyK8YPph1VgR2yNcQln5fEcOeeA= X-Received: by 2002:a81:17d0:0:b0:31c:c5e2:fc1e with SMTP id 199-20020a8117d0000000b0031cc5e2fc1emr15917280ywx.196.1657888347705; Fri, 15 Jul 2022 05:32:27 -0700 (PDT) MIME-Version: 1.0 References: <20220713112612.6935-1-limanyi@uniontech.com> <20220713182852.GA841582@bhelgaas> <7305201c-eaf2-cb36-80fe-15174d3e33c7@uniontech.com> <20220715082945.GA10661@srcf.ucam.org> <20220715093236.GA12020@srcf.ucam.org> <62d14039.1c69fb81.86d3c.71c2SMTPIN_ADDED_BROKEN@mx.google.com> In-Reply-To: <62d14039.1c69fb81.86d3c.71c2SMTPIN_ADDED_BROKEN@mx.google.com> From: "Rafael J. Wysocki" Date: Fri, 15 Jul 2022 14:32:16 +0200 Message-ID: Subject: Re: [PATCH] PCI/ASPM: Should not report ASPM support to BIOS if FADT indicates ASPM is unsupported To: Manyi Li Cc: Matthew Garrett , Kai-Heng Feng , Bjorn Helgaas , Bjorn Helgaas , "Saheed O. Bolarinwa" , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rajat Jain , Linux PCI , Linux Kernel Mailing List , Vidya Sagar , "Rafael J. Wysocki" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 15, 2022 at 12:23 PM Manyi Li wrote: > > > > On 2022/7/15 17:32, Matthew Garrett wrote: > > On Fri, Jul 15, 2022 at 05:19:25PM +0800, Manyi Li wrote: > >> > >> > >> On 2022/7/15 16:29, Matthew Garrett wrote: > >>> On Fri, Jul 15, 2022 at 03:40:36PM +0800, Manyi Li wrote: > >>> > >>>> Please see the details of this issus: > >>>> https://bugzilla.kernel.org/show_bug.cgi?id=216245 > >>> > >>> Hmm. The only case where changing aspm_support_enabled to false should > >>> matter is in pcie_aspm_init_link_state(), where it looks like we'll > >>> potentially rewrite some registers even if aspm_disabled is true. I > >>> think in theory we shouldn't actually modify anything as a result, and > >>> the lspcis from the bug don't show any ASPM values having changed, but I > >>> don't trust Realtek hardware in the general case so maybe it gets upset > >>> here? If the proposed patch is to just set aspm_support_enabled to false > >>> when we see the FADT bit set then I think this is fine. > >>> > >> > >> "aspm_support_enabled" alse be used in calculate_support(): > >> if (pcie_aspm_support_enabled()) > >> support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT; > >> When set OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT, cause this AER > >> issue. I want don't set OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT when > >> we see the FADT bit set. > > > > Oh hm. Are you sure it's the OSC call that breaks it? I have some > > I don't sure. > > > recollection that I verified the behaviour of Windows here, but it's > > been over 10 years since I touched this so I could well be wrong. I can > > try to set up a test env to verify the behaviour of Windows when it > > comes to _OSC if the FADT says ASPM is unsupported. > > > but, I did a test,this modification also solves the problem: > > diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c > index d57cf8454b93..b3ea8e886d7c 100644 > --- a/drivers/acpi/pci_root.c > +++ b/drivers/acpi/pci_root.c > @@ -494,8 +494,8 @@ static u32 calculate_support(void) > support |= OSC_PCI_HPX_TYPE_3_SUPPORT; > if (pci_ext_cfg_avail()) > support |= OSC_PCI_EXT_CONFIG_SUPPORT; > - if (pcie_aspm_support_enabled()) > - support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT; > +// if (pcie_aspm_support_enabled()) > +// support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT; > if (pci_msi_enabled()) > support |= OSC_PCI_MSI_SUPPORT; > if (IS_ENABLED(CONFIG_PCIE_EDR)) > > This issue occur in the Notebook: ASUSTeK COMPUTER INC. X456UJ > (ASUS-NotebookSKU) Notebook > > log "AER: Corrected error received: 0000:00:1c.5" is in the device: > 00:1c.5 PCI bridge [0604]: Intel Corporation Sunrise Point-LP PCI > Express Root Port #6 [8086:9d15] (rev f1) So it looks like the BIOS sets ACPI_FADT_NO_ASPM and then happily grants control of ASPM via _OSC. That's somewhat contradictory. I would rather look at adjusting pcie_aspm_sanity_check() to this case instead of wholesale changing the way _OSC is handled at the host bridge level.