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Date:   Fri, 15 Jul 2022 16:54:05 +0100
From:   Mark Brown <broonie@kernel.org>
To:     "Mahapatra, Amit Kumar" <amit.kumar-mahapatra@amd.com>
Cc:     Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>,
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Subject: Re: [RFC PATCH 1/2] spi: Add multiple CS support for a single SPI
 device
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On Fri, Jul 15, 2022 at 03:35:49PM +0000, Mahapatra, Amit Kumar wrote:

> > That doesn't address the issue, the issue is checking that the driver c=
an
> > support multiple chip selects.

> To address this issue, in spi core we will check the number of items=20
> in the "reg" property of the flash node(which is nothing but the=20
> number of chip selects) against the "num-cs" property of the spi=20
> controller(which is total number of chip selects supported by the=20
> controller). If the number of items mentioned in the "reg" property=20
> is greater than "num-cs" value then we error out.

> For eg.,

> rc =3D of_property_read_variable_u32_array(nc, "reg", &cs[0], 1,=20
> 						SPI_CS_CNT_MAX);
> if(rc > ctlr->num_chipselect) {
> 	dev_err(&ctlr->dev, "%pOF has invalid 'reg' property (%d)\n",=20
> 							nc, rc);
> 	return -EINVAL;
> }

This would check that the controller has at least the number of chip
selects specified but it would not check that the controller is actually
capable of using more than one chip select at once.  We should be
validating both that the chip selects are available and that the
controller can do something useful with them (and probably have an
implementation in the core for doing so via GPIO).

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-----BEGIN PGP SIGNATURE-----

iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmLRjZ0ACgkQJNaLcl1U
h9DvNgf8CXWe2TL7deZzQsKFmwm4r44oFp98ORLdX9fjwHjXyvyWACyJHEKdf/DO
Tpngc2qCEoBpumurCNRrB8sUI7w6GoikYd0Q25+u6ggKF1Qr5bgkPr+jWVyEx9PY
XoJDU5nqv7GTLDkc88KG1pf3yyebiJfkyG1ZckcE0Gi7CMtVjTbPTJ9D+wFptMQM
FiHctGpxjWx6GNDefyyO7Rdc7f0brEiDy5WoRoLGRlF2RoKGOEUtjtPBNkoFQVSl
ldtIrzip4BxzLTfeDayqEyi2MRHqYlpYCH6gtlMVsRGwNq2fNejEa3KhSo4evar3
vql8mcvRgsrJgTDzC/aBH1VojkTC0A==
=AAV5
-----END PGP SIGNATURE-----

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