Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Fri, 15 Jul 2022 10:31:09 -0700 (PDT)
Subject: [GIT PULL] RISC-V Fixes for 5.19-rc7
CC:        linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
From:   Palmer Dabbelt <palmer@rivosinc.com>
To:     Linus Torvalds <torvalds@linux-foundation.org>
Message-ID: <mhng-077c44de-b969-4894-9547-066c73040835@palmer-ri-x1c9>
Precedence: bulk

The following changes since commit e83031564137cf37e07c2d10ad468046ff48a0cf:

  riscv: Fix ALT_THEAD_PMA's asm parameters (2022-06-17 06:16:46 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.19-rc7

for you to fetch changes up to 7fccd723912702acfc2d75e8f0596982534f7f24:

  Merge tag 'dt-fixes-for-palmer-5.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git into fixes (2022-07-13 10:44:22 -0700)

----------------------------------------------------------------
RISC-V Fixes for 5.19-rc7

* A fix to avoid printing a warning when modules do not exercise any
  errata-dependent behavior and the SiFive errata are enabled.
* A fix to the Microchip PFSOC to attach the L2 cache to the CPU nodes.

----------------------------------------------------------------
Conor Dooley (1):
      riscv: dts: microchip: hook up the mpfs' l2cache

Heiko Stuebner (1):
      riscv: don't warn for sifive erratas in modules

Palmer Dabbelt (1):
      Merge tag 'dt-fixes-for-palmer-5.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git into fixes

 arch/riscv/boot/dts/microchip/mpfs.dtsi | 4 ++++
 arch/riscv/errata/sifive/errata.c       | 3 ++-
 2 files changed, 6 insertions(+), 1 deletion(-)