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From:   Sean Anderson <sean.anderson@seco.com>
To:     "David S . Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>,
        Madalin Bucur <madalin.bucur@nxp.com>, netdev@vger.kernel.org
Cc:     Paolo Abeni <pabeni@redhat.com>,
        Eric Dumazet <edumazet@google.com>,
        linux-arm-kernel@lists.infradead.org,
        Russell King <linux@armlinux.org.uk>,
        linux-kernel@vger.kernel.org,
        Sean Anderson <sean.anderson@seco.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Li Yang <leoyang.li@nxp.com>, Rob Herring <robh+dt@kernel.org>,
        Shawn Guo <shawnguo@kernel.org>, devicetree@vger.kernel.org
Subject: [PATCH net-next v3 45/47] arm64: dts: ls1088a: Add serdes bindings
Date:   Fri, 15 Jul 2022 17:59:52 -0400
Message-Id: <20220715215954.1449214-46-sean.anderson@seco.com>
In-Reply-To: <20220715215954.1449214-1-sean.anderson@seco.com>
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This adds bindings for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

Changes in v3:
- New

 .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 96 +++++++++++++++++++
 1 file changed, 96 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index f476b7d8b056..987892bc69d7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -238,6 +238,102 @@ reset: syscon@1e60000 {
 			reg = <0x0 0x1e60000 0x0 0x10000>;
 		};
 
+		serdes1: phy@1ea0000 {
+			#clock-cells = <1>;
+			#phy-cells = <1>;
+			compatible = "fsl,ls1088a-serdes", "fsl,lynx-10g";
+			reg = <0x0 0x1ea0000 0x0 0x2000>;
+			status = "disabled";
+
+			pccr-8 {
+				fsl,pccr = <0x8>;
+
+				/* SG3 */
+				sgmii-0 {
+					fsl,index = <0>;
+					fsl,cfg = <0x1>;
+					fsl,first-lane = <3>;
+					fsl,proto = "sgmii";
+				};
+
+				/* SG7 */
+				sgmii-1 {
+					fsl,index = <1>;
+					fsl,cfg = <0x1>;
+					fsl,first-lane = <2>;
+					fsl,proto = "sgmii";
+				};
+
+				/* SG1 */
+				sgmii-2 {
+					fsl,index = <2>;
+					fsl,cfg = <0x1>;
+					fsl,first-lane = <1>;
+					fsl,proto = "sgmii25";
+				};
+
+				/* SG2 */
+				sgmii-3 {
+					fsl,index = <3>;
+					fsl,cfg = <0x1>;
+					fsl,first-lane = <0>;
+					fsl,proto = "sgmii25";
+				};
+			};
+
+			pccr-9 {
+				fsl,pccr = <0x9>;
+
+				/* QSGa */
+				qsgmii-0 {
+					fsl,index = <0>;
+					fsl,cfg = <0x1>;
+					fsl,first-lane = <3>;
+					fsl,proto = "qsgmii";
+				};
+
+				/* QSGb */
+				qsgmii-1 {
+					fsl,index = <1>;
+					fsl,proto = "qsgmii";
+
+					cfg-1 {
+						fsl,cfg = <0x1>;
+						fsl,first-lane = <2>;
+					};
+
+					cfg-2 {
+						fsl,cfg = <0x2>;
+						fsl,first-lane = <0>;
+					};
+				};
+			};
+
+			pccr-b {
+				fsl,pccr = <0xb>;
+
+				/* XFI1 */
+				xfi-0 {
+					fsl,index = <0>;
+					fsl,cfg = <0x1>;
+					/*
+					 * Table 23-1 and section 23.5.16.4
+					 * disagree; this reflects the table
+					 */
+					fsl,first-lane = <1>;
+					fsl,proto = "xfi";
+				};
+
+				/* XFI2 */
+				xfi-1 {
+					fsl,index = <1>;
+					fsl,cfg = <0x1>;
+					fsl,first-lane = <0>;
+					fsl,proto = "xfi";
+				};
+			};
+		};
+
 		isc: syscon@1f70000 {
 			compatible = "fsl,ls1088a-isc", "syscon";
 			reg = <0x0 0x1f70000 0x0 0x10000>;
-- 
2.35.1.1320.gc452695387.dirty