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From:   "Wu, Hao" <hao.wu@intel.com>
To:     "matthew.gerlach@linux.intel.com" <matthew.gerlach@linux.intel.com>,
        "Xu, Yilun" <yilun.xu@intel.com>,
        "Weight, Russell H" <russell.h.weight@intel.com>,
        "Muddebihal, Basheer Ahmed" <basheer.ahmed.muddebihal@intel.com>,
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        "linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Zhang, Tianfei" <tianfei.zhang@intel.com>
Subject: RE: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification
 documentation
Thread-Topic: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification
 documentation
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Date:   Mon, 18 Jul 2022 04:43:30 +0000
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References: <20220707150549.265621-1-matthew.gerlach@linux.intel.com>
 <20220707150549.265621-2-matthew.gerlach@linux.intel.com>
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> -----Original Message-----
> From: matthew.gerlach@linux.intel.com <matthew.gerlach@linux.intel.com>
> Sent: Thursday, July 7, 2022 11:06 PM
> To: Wu, Hao <hao.wu@intel.com>; Xu, Yilun <yilun.xu@intel.com>; Weight,
> Russell H <russell.h.weight@intel.com>; Muddebihal, Basheer Ahmed
> <basheer.ahmed.muddebihal@intel.com>; trix@redhat.com;
> mdf@kernel.org; corbet@lwn.net; linux-fpga@vger.kernel.org; linux-
> doc@vger.kernel.org; linux-kernel@vger.kernel.org; Zhang, Tianfei
> <tianfei.zhang@intel.com>
> Cc: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> Subject: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification
> documentation
>=20
> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>=20
> Add documentation on identifying FPGA based PCI cards prompted
> by discussion on the linux-fpga@vger.kernel.org mailing list.
>=20
> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> ---
> v3: Add url to page tracking PCI ID information for DFL based cards.
>=20
> v2: Introduced in v2.
> ---
>  Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>=20
> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> index 15b670926084..5144775b860a 100644
> --- a/Documentation/fpga/dfl.rst
> +++ b/Documentation/fpga/dfl.rst
> @@ -507,6 +507,27 @@ ids application.
>  https://github.com/OPAE/dfl-feature-id
>=20
>=20
> +PCI Device Identification
> +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D
> +Since FPGA based PCI cards can be reconfigured to a perform a completely
> +new function at runtime, properly identifying such cards and binding the
> +correct driver can be challenging. In many use cases, deployed FPGA base=
d
> +PCI cards are essentially static and the PCI Product ID and Vendor ID pa=
ir
> +is sufficient to identify the card.  The DFL framework helps with the
> +dynamic case of deployed FPGA cards changing at run time by providing
> +more detailed information about card discoverable at runtime.
> +
> +At one level, the DFL on a PCI card describes the function of the card.
> +However, the same DFL could be instantiated on different physical cards.
> +Conversely, different DFLs could be instantiated on the same physical ca=
rd.
> +Practical management of a cloud containing a heterogeneous set of such
> cards
> +requires a PCI level of card identification. While the PCI Product ID an=
d
> +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected
> +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem
> +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking
> +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci=
-
> ids.rst.

I feel that we may not really need this in fpga-dfl doc, as this is not des=
cribing
any new method provided by DFL, but just something from PCI standard, right=
?

Thanks
Hao