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([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jul 2022 22:28:59 -0700 X-IronPort-AV: E=Sophos;i="5.92,280,1650956400"; d="scan'208";a="924201445" Received: from lananhtr-mobl3.ccr.corp.intel.com ([10.215.250.14]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jul 2022 22:28:56 -0700 Message-ID: <6d08939a167870ff7c1c83bb254fda5939f1d648.camel@intel.com> Subject: Re: [PATCH v3 3/4] thermal/core: Build ascending ordered indexes for the trip points From: Zhang Rui To: Daniel Lezcano , rafael@kernel.org Cc: quic_manafm@quicinc.com, amitk@kernel.org, lukasz.luba@arm.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Date: Mon, 18 Jul 2022 13:28:55 +0800 In-Reply-To: <20220715210911.714479-3-daniel.lezcano@linaro.org> References: <20220715210911.714479-1-daniel.lezcano@linaro.org> <20220715210911.714479-3-daniel.lezcano@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: base64 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