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References: <20220714164507.561751-1-mairacanal@riseup.net> <20220714164507.561751-3-mairacanal@riseup.net>
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From:   Alex Deucher <alexdeucher@gmail.com>
Date:   Mon, 18 Jul 2022 14:53:29 -0400
Message-ID: <CADnq5_NzUdMWL2Am6hPkZsthMu=ONPvb1Lu85v0f2PoqA5uWNw@mail.gmail.com>
Subject: Re: [PATCH 03/12] drm/amd/display: Remove unused clk_src variable
To:     =?UTF-8?B?TWHDrXJhIENhbmFs?= <mairacanal@riseup.net>
Cc:     Harry Wentland <harry.wentland@amd.com>,
        Leo Li <sunpeng.li@amd.com>,
        Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
        Alex Deucher <alexander.deucher@amd.com>,
        Christian Koenig <christian.koenig@amd.com>,
        xinhui pan <Xinhui.Pan@amd.com>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>,
        Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>,
        Aurabindo Pillai <aurabindo.pillai@amd.com>,
        Magali Lemes <magalilemes00@gmail.com>,
        Tales Lelo da Aparecida <tales.aparecida@gmail.com>,
        LKML <linux-kernel@vger.kernel.org>,
        amd-gfx list <amd-gfx@lists.freedesktop.org>,
        Melissa Wen <mwen@igalia.com>,
        Isabella Basso <isabbasso@riseup.net>, andrealmeid@riseup.net
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Precedence: bulk

Applied.  Thanks!

Alex

On Thu, Jul 14, 2022 at 12:45 PM Ma=C3=ADra Canal <mairacanal@riseup.net> w=
rote:
>
> Remove the variable clk_src from the function dcn3_get_pix_clk_dividers.
>
> This was pointed by clang with the following warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1279:25: =
warning:
> variable 'clk_src' set but not used [-Wunused-but-set-variable]
>         struct dce110_clk_src *clk_src;
>                                ^
> 1 warning generated.
>
> Signed-off-by: Ma=C3=ADra Canal <mairacanal@riseup.net>
> ---
>  drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/driv=
ers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> index 5cc7cc0b2f2d..d55da1ab1ac2 100644
> --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> @@ -1276,9 +1276,7 @@ static uint32_t dcn3_get_pix_clk_dividers(
>                 struct pll_settings *pll_settings)
>  {
>         unsigned long long actual_pix_clk_100Hz =3D pix_clk_params ? pix_=
clk_params->requested_pix_clk_100hz : 0;
> -       struct dce110_clk_src *clk_src;
>
> -       clk_src =3D TO_DCE110_CLK_SRC(cs);
>         DC_LOGGER_INIT();
>
>         if (pix_clk_params =3D=3D NULL || pll_settings =3D=3D NULL
> --
> 2.36.1
>