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Message-ID: <e341619e-bac3-710f-8f77-1addfffa9a16@quicinc.com>
Date:   Mon, 18 Jul 2022 12:48:38 -0700
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Subject: Re: [PATCH v3 2/2] power: reset: qcom-pon: add support for
 qcom,pmk8350-pon compatible string
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To:     Sebastian Reichel <sebastian.reichel@collabora.com>
CC:     <corbet@lwn.net>, <robh+dt@kernel.org>, <agross@kernel.org>,
        <bjorn.andersson@linaro.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <vkoul@kernel.org>, <linux-doc@vger.kernel.org>,
        <linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>
References: <20220713193350.29796-1-quic_amelende@quicinc.com>
 <20220713193350.29796-3-quic_amelende@quicinc.com>
 <20220716215803.r3ldaswyhehfpcip@mercury.elektranox.org>
From:   Anjelique Melendez <quic_amelende@quicinc.com>
In-Reply-To: <20220716215803.r3ldaswyhehfpcip@mercury.elektranox.org>
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On 7/16/2022 2:58 PM, Sebastian Reichel wrote:
> Hi,
> 
> On Wed, Jul 13, 2022 at 12:33:51PM -0700, Anjelique Melendez wrote:
>> Add support for the new "qcom,pmk8350-pon" comptaible string.
>>
>> Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
>> ---
>>  drivers/power/reset/qcom-pon.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/power/reset/qcom-pon.c b/drivers/power/reset/qcom-pon.c
>> index 4a688741a88a..16bc01738be9 100644
>> --- a/drivers/power/reset/qcom-pon.c
>> +++ b/drivers/power/reset/qcom-pon.c
>> @@ -82,6 +82,7 @@ static const struct of_device_id pm8916_pon_id_table[] = {
>>  	{ .compatible = "qcom,pm8916-pon", .data = (void *)GEN1_REASON_SHIFT },
>>  	{ .compatible = "qcom,pms405-pon", .data = (void *)GEN1_REASON_SHIFT },
>>  	{ .compatible = "qcom,pm8998-pon", .data = (void *)GEN2_REASON_SHIFT },
>> +	{ .compatible = "qcom,pmk8350-pon", .data = (void *)GEN2_REASON_SHIFT },
>>  	{ }
>>  };
>>  MODULE_DEVICE_TABLE(of, pm8916_pon_id_table);
> 
> No handling of the second register? Why is it needed in DT in the
> first place?
> 
> -- Sebastian

Hi Sebastian,

The handling of the second register takes place in drivers/input/misc/pm8941-pwrkey.c.
The patch that handles this change can be found at:
https://lore.kernel.org/linux-arm-msm/20220422191239.6271-4-quic_amelende@quicinc.com/.
This patch has been applied.

Krzystof and I discuss the need for a new compatible string here:
https://lore.kernel.org/all/99a5d9ac-9c20-b441-44af-26772a0e989d@linaro.org/.

In short, the gen1/gen2/gen3 children pon devices will use the "reg" address(es) defined
from their parent. Currently, "qcom,pm8998-pon" is too generic as it is being used for
both gen1/gen2 and gen3 children. So we must add the new "qcom,pmk8350-pon" compatible
string to be used for gen3 children so that the second register can be defined. 

Thanks,
Anjelique