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Mon, 18 Jul 2022 15:37:47 -0700 (PDT) MIME-Version: 1.0 References: <98939c0ec83a109c8f49045e82096d6cdd5dafa3.1651774251.git.isaku.yamahata@intel.com> <20220629101356.GA882746@ls.amr.corp.intel.com> In-Reply-To: <20220629101356.GA882746@ls.amr.corp.intel.com> From: Sagi Shahar Date: Mon, 18 Jul 2022 15:37:35 -0700 Message-ID: Subject: Re: [RFC PATCH v6 090/104] KVM: TDX: Handle TDX PV CPUID hypercall To: Isaku Yamahata Cc: "Yamahata, Isaku" , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Paolo Bonzini , Erdem Aktas , Sean Christopherson Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-17.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, USER_IN_DEF_DKIM_WL,USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jun 29, 2022 at 3:14 AM Isaku Yamahata wrote: > > On Tue, Jun 14, 2022 at 11:15:00AM -0700, > Sagi Shahar wrote: > > > On Thu, May 5, 2022 at 11:16 AM wrote: > > > > > > From: Isaku Yamahata > > > > > > Wire up TDX PV CPUID hypercall to the KVM backend function. > > > > > > Signed-off-by: Isaku Yamahata > > > --- > > > arch/x86/kvm/vmx/tdx.c | 22 ++++++++++++++++++++++ > > > 1 file changed, 22 insertions(+) > > > > > > diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c > > > index 9c712f661a7c..c7cdfee397ec 100644 > > > --- a/arch/x86/kvm/vmx/tdx.c > > > +++ b/arch/x86/kvm/vmx/tdx.c > > > @@ -946,12 +946,34 @@ static int tdx_emulate_vmcall(struct kvm_vcpu *vcpu) > > > return 1; > > > } > > > > > > +static int tdx_emulate_cpuid(struct kvm_vcpu *vcpu) > > > +{ > > > + u32 eax, ebx, ecx, edx; > > > + > > > + /* EAX and ECX for cpuid is stored in R12 and R13. */ > > > + eax = tdvmcall_a0_read(vcpu); > > > + ecx = tdvmcall_a1_read(vcpu); > > > + > > > + kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true); > > > > According to the GHCI spec section 3.6 > > (TDG.VP.VMCALL) we should return > > VMCALL_INVALID_OPERAND if an invalid CPUID is requested. > > > > kvm_cpuid already returns false in this case so we should use that > > return value to set the tdvmcall return code in case of invalid leaf. > > Based on CPUID instruction, cpuid results in #UD when lock prefix is used or > earlier CPU that doesn't support cpuid instruction. > So I'm not sure what CPUID input result in INVALID_OPERAND error. > Does the following make sense for you? > > --- a/arch/x86/kvm/vmx/tdx.c > +++ b/arch/x86/kvm/vmx/tdx.c > @@ -1347,7 +1347,7 @@ static int tdx_emulate_cpuid(struct kvm_vcpu *vcpu) > eax = tdvmcall_a0_read(vcpu); > ecx = tdvmcall_a1_read(vcpu); > > - kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true); > + kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, false); > > tdvmcall_a0_write(vcpu, eax); > tdvmcall_a1_write(vcpu, ebx); > > thanks, If any CPUID request is considered valid, then perhaps the spec itself needs to be updated. Right now it clearly states that TDG.VP.VMCALL_INVALID_OPERAND is returned if "Invalid CPUID requested" which I understood as a non-existing leaf. But if you say that a non-existing leaf is still a valid CPUID request than I'm not sure what "Invalid CPUID requested" means in the spec itself. > > -- > Isaku Yamahata