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[2620:137:e000::1:20]) by mx.google.com with ESMTP id kb15-20020a17090ae7cf00b001f06deff0d4si21574486pjb.48.2022.07.18.23.35.27; Mon, 18 Jul 2022 23:35:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=BuDNkzf1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237014AbiGSGNs (ORCPT + 99 others); Tue, 19 Jul 2022 02:13:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234444AbiGSGNr (ORCPT ); Tue, 19 Jul 2022 02:13:47 -0400 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79AE61C11F for ; Mon, 18 Jul 2022 23:13:45 -0700 (PDT) Received: by mail-ed1-x52a.google.com with SMTP id m8so4754809edd.9 for ; Mon, 18 Jul 2022 23:13:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=7hkzYipv6QANdIAdRAg9h0BtLWb126ab0LzpcCvcOQM=; b=BuDNkzf1smCEFzAxlPTgGFRgpgH+zyqAym6t26Sbn4+B4S1ZCBTYHqrps8aetR2D4J 5B0/1amoFrDnelpWHNGZbSxcMLW7KtuwE2UKarGqVTEHAPB9JzqOOmXLiJofMGGzxDuc 2crlL2Htv/HK3EfbruPAlp6RO7pRrx7Fjq78Yf0cK/5WnNQi9RTDqaRoBvE7okJdoGce a2fSiE30PiMLxO2uC2SMd64tZw+tM6VsA7vFhd75iDthpqzy6HCuY3tmQQ7p+WYMDdDc NI3PuKXhSbr9owsGxesgZVf3W0kI43qYhAmRhhKbSjnoEwUDEXIQab/YMqo1jOS8XX+E 5jtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=7hkzYipv6QANdIAdRAg9h0BtLWb126ab0LzpcCvcOQM=; b=d249EId1BPfefP037mt3/6+jNIr75mUClj8SysnP8AXz5ncWya2+w9V6mFuSjbRqlD bs5GSi/mv9Mu9fMHUzCOQJW54jGG7BjoE5rS/6spzOdnHXzZShWTyYDnTgTqn+RuTekI dW0I61IQ+GMBdMOhXOZPqSy4L7rbLs6jTLOxIHf5guDNKNfvzhSqcj9t5LzX5KF6NK/0 LF//FacnhGzC5f8H+J2YNqXGJpfPJ3pPPZKfw4KObJ0ZgiOr3rmfXwU4KAGJfJPqFV6p mUxkFtwdnzddPr1Qvl+mkIv+e1v/+HKLSo8XKSCRJSRmrrPTv6PNWn0uRHvaoDPWxVbY n8IQ== X-Gm-Message-State: AJIora8CFb1+31wdywUyd7BWnUUHgf9bDBV1bFMMKtWeNC1e9BYg1hwK tjSIwT4F69l4yoOT4SyQI5HluoOFETnxjqPBwBQ= X-Received: by 2002:a05:6402:d53:b0:43b:a0cf:d970 with SMTP id ec19-20020a0564020d5300b0043ba0cfd970mr367240edb.277.1658211223937; Mon, 18 Jul 2022 23:13:43 -0700 (PDT) MIME-Version: 1.0 References: <20220718090050.2261-1-21cnbao@gmail.com> <87mtd62apo.fsf@yhuang6-desk2.ccr.corp.intel.com> <87zgh5232o.fsf@yhuang6-desk2.ccr.corp.intel.com> <416a06f6-ca7d-d4a9-2cda-af0ad6e28261@arm.com> <87o7xl1wpb.fsf@yhuang6-desk2.ccr.corp.intel.com> In-Reply-To: <87o7xl1wpb.fsf@yhuang6-desk2.ccr.corp.intel.com> From: Barry Song <21cnbao@gmail.com> Date: Tue, 19 Jul 2022 18:13:32 +1200 Message-ID: Subject: Re: [RESEND PATCH v3] arm64: enable THP_SWAP for arm64 To: "Huang, Ying" Cc: Anshuman Khandual , Andrew Morton , Catalin Marinas , LAK , Linux-MM , Steven Price , Will Deacon , Andrea Arcangeli , =?UTF-8?B?6YOt5YGl?= , hanchuanhua , Johannes Weiner , Hugh Dickins , LKML , Minchan Kim , Yang Shi , Barry Song , =?UTF-8?B?5byg6K+X5piOKFNpbW9uIFpoYW5nKQ==?= Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 19, 2022 at 5:47 PM Huang, Ying wrote: > > Barry Song <21cnbao@gmail.com> writes: > > > On Tue, Jul 19, 2022 at 3:59 PM Barry Song <21cnbao@gmail.com> wrote: > >> > >> On Tue, Jul 19, 2022 at 3:35 PM Anshuman Khandual > >> wrote: > >> > > >> > > >> > > >> > On 7/19/22 08:58, Huang, Ying wrote: > >> > > Anshuman Khandual writes: > >> > > > >> > >> On 7/19/22 06:53, Barry Song wrote: > >> > >>> On Tue, Jul 19, 2022 at 12:44 PM Huang, Ying wrote: > >> > >>>> > >> > >>>> Barry Song <21cnbao@gmail.com> writes: > >> > >>>> > >> > >>>>> From: Barry Song > >> > >>>>> > >> > >>>>> THP_SWAP has been proven to improve the swap throughput significantly > >> > >>>>> on x86_64 according to commit bd4c82c22c367e ("mm, THP, swap: delay > >> > >>>>> splitting THP after swapped out"). > >> > >>>>> As long as arm64 uses 4K page size, it is quite similar with x86_64 > >> > >>>>> by having 2MB PMD THP. THP_SWAP is architecture-independent, thus, > >> > >>>>> enabling it on arm64 will benefit arm64 as well. > >> > >>>>> A corner case is that MTE has an assumption that only base pages > >> > >>>>> can be swapped. We won't enable THP_SWAP for ARM64 hardware with > >> > >>>>> MTE support until MTE is reworked to coexist with THP_SWAP. > >> > >>>>> > >> > >>>>> A micro-benchmark is written to measure thp swapout throughput as > >> > >>>>> below, > >> > >>>>> > >> > >>>>> unsigned long long tv_to_ms(struct timeval tv) > >> > >>>>> { > >> > >>>>> return tv.tv_sec * 1000 + tv.tv_usec / 1000; > >> > >>>>> } > >> > >>>>> > >> > >>>>> main() > >> > >>>>> { > >> > >>>>> struct timeval tv_b, tv_e;; > >> > >>>>> #define SIZE 400*1024*1024 > >> > >>>>> volatile void *p = mmap(NULL, SIZE, PROT_READ | PROT_WRITE, > >> > >>>>> MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); > >> > >>>>> if (!p) { > >> > >>>>> perror("fail to get memory"); > >> > >>>>> exit(-1); > >> > >>>>> } > >> > >>>>> > >> > >>>>> madvise(p, SIZE, MADV_HUGEPAGE); > >> > >>>>> memset(p, 0x11, SIZE); /* write to get mem */ > >> > >>>>> > >> > >>>>> gettimeofday(&tv_b, NULL); > >> > >>>>> madvise(p, SIZE, MADV_PAGEOUT); > >> > >>>>> gettimeofday(&tv_e, NULL); > >> > >>>>> > >> > >>>>> printf("swp out bandwidth: %ld bytes/ms\n", > >> > >>>>> SIZE/(tv_to_ms(tv_e) - tv_to_ms(tv_b))); > >> > >>>>> } > >> > >>>>> > >> > >>>>> Testing is done on rk3568 64bit quad core processor Quad Core > >> > >>>>> Cortex-A55 platform - ROCK 3A. > >> > >>>>> thp swp throughput w/o patch: 2734bytes/ms (mean of 10 tests) > >> > >>>>> thp swp throughput w/ patch: 3331bytes/ms (mean of 10 tests) > >> > >>>>> > >> > >>>>> Cc: "Huang, Ying" > >> > >>>>> Cc: Minchan Kim > >> > >>>>> Cc: Johannes Weiner > >> > >>>>> Cc: Hugh Dickins > >> > >>>>> Cc: Andrea Arcangeli > >> > >>>>> Cc: Anshuman Khandual > >> > >>>>> Cc: Steven Price > >> > >>>>> Cc: Yang Shi > >> > >>>>> Signed-off-by: Barry Song > >> > >>>>> --- > >> > >>>>> -v3: > >> > >>>>> * refine the commit log; > >> > >>>>> * add a benchmark result; > >> > >>>>> * refine the macro of arch_thp_swp_supported > >> > >>>>> Thanks to the comments of Anshuman, Andrew, Steven > >> > >>>>> > >> > >>>>> arch/arm64/Kconfig | 1 + > >> > >>>>> arch/arm64/include/asm/pgtable.h | 6 ++++++ > >> > >>>>> include/linux/huge_mm.h | 12 ++++++++++++ > >> > >>>>> mm/swap_slots.c | 2 +- > >> > >>>>> 4 files changed, 20 insertions(+), 1 deletion(-) > >> > >>>>> > >> > >>>>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > >> > >>>>> index 1652a9800ebe..e1c540e80eec 100644 > >> > >>>>> --- a/arch/arm64/Kconfig > >> > >>>>> +++ b/arch/arm64/Kconfig > >> > >>>>> @@ -101,6 +101,7 @@ config ARM64 > >> > >>>>> select ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP > >> > >>>>> select ARCH_WANT_LD_ORPHAN_WARN > >> > >>>>> select ARCH_WANTS_NO_INSTR > >> > >>>>> + select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES > >> > >>>>> select ARCH_HAS_UBSAN_SANITIZE_ALL > >> > >>>>> select ARM_AMBA > >> > >>>>> select ARM_ARCH_TIMER > >> > >>>>> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > >> > >>>>> index 0b6632f18364..78d6f6014bfb 100644 > >> > >>>>> --- a/arch/arm64/include/asm/pgtable.h > >> > >>>>> +++ b/arch/arm64/include/asm/pgtable.h > >> > >>>>> @@ -45,6 +45,12 @@ > >> > >>>>> __flush_tlb_range(vma, addr, end, PUD_SIZE, false, 1) > >> > >>>>> #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ > >> > >>>>> > >> > >>>>> +static inline bool arch_thp_swp_supported(void) > >> > >>>>> +{ > >> > >>>>> + return !system_supports_mte(); > >> > >>>>> +} > >> > >>>>> +#define arch_thp_swp_supported arch_thp_swp_supported > >> > >>>>> + > >> > >>>>> /* > >> > >>>>> * Outside of a few very special situations (e.g. hibernation), we always > >> > >>>>> * use broadcast TLB invalidation instructions, therefore a spurious page > >> > >>>>> diff --git a/include/linux/huge_mm.h b/include/linux/huge_mm.h > >> > >>>>> index de29821231c9..4ddaf6ad73ef 100644 > >> > >>>>> --- a/include/linux/huge_mm.h > >> > >>>>> +++ b/include/linux/huge_mm.h > >> > >>>>> @@ -461,4 +461,16 @@ static inline int split_folio_to_list(struct folio *folio, > >> > >>>>> return split_huge_page_to_list(&folio->page, list); > >> > >>>>> } > >> > >>>>> > >> > >>>>> +/* > >> > >>>>> + * archs that select ARCH_WANTS_THP_SWAP but don't support THP_SWP due to > >> > >>>>> + * limitations in the implementation like arm64 MTE can override this to > >> > >>>>> + * false > >> > >>>>> + */ > >> > >>>>> +#ifndef arch_thp_swp_supported > >> > >>>>> +static inline bool arch_thp_swp_supported(void) > >> > >>>>> +{ > >> > >>>>> + return true; > >> > >>>>> +} > >> > >>>> > >> > >>>> How about the following? > >> > >>>> > >> > >>>> static inline bool arch_wants_thp_swap(void) > >> > >>>> { > >> > >>>> return IS_ENABLED(ARCH_WANTS_THP_SWAP); > >> > >>>> } > >> > >>> > >> > >>> This looks good. then i'll need to change arm64 to > >> > >>> > >> > >>> +static inline bool arch_thp_swp_supported(void) > >> > >>> +{ > >> > >>> + return IS_ENABLED(ARCH_WANTS_THP_SWAP) && !system_supports_mte(); > >> > >>> +} > >> > >> > >> > >> Why ? CONFIG_THP_SWAP depends on ARCH_WANTS_THP_SWAP. In folio_alloc_swap(), > >> > >> IS_ENABLED(CONFIG_THP_SWAP) enabled, will also imply ARCH_WANTS_THP_SWAP too > >> > >> is enabled. Hence checking for ARCH_WANTS_THP_SWAP again does not make sense > >> > >> either in the generic fallback stub, or in arm64 platform override. Because > >> > >> without ARCH_WANTS_THP_SWAP enabled, arch_thp_swp_supported() should never > >> > >> be called in the first place. > >> > > > >> > > For the only caller now, the checking looks redundant. But the original > >> > > proposed implementation as follows, > >> > > > >> > > static inline bool arch_thp_swp_supported(void) > >> > > { > >> > > return true; > >> > > } > >> > > > >> > > will return true even on architectures that don't support/want THP swap. > >> > > >> > But the function will never be called on for those platforms. > >> > > >> > > That will confuse people too. > >> > > >> > I dont see how. > >> > > >> > > > >> > > And the "redundant" checking has no run time overhead, because compiler > >> > > will do the trick. > >> > I understand that, but dont think this indirection is necessary. > >> > >> Hi Anshuman, Hi Ying, > >> Thanks for the comments of both of you. Does the below look ok? > >> > >> generic, > >> > >> static inline bool arch_wants_thp_swap(void) > >> { > >> return IS_ENABLED(CONFIG_THP_SWAP); > >> } > >> > > > > sorry, i actually meant arch_thp_swp_supported() but not > > arch_wants_thp_swap() in generic code, > > > > static inline bool arch_thp_swp_supported(void) > > { > > return IS_ENABLED(CONFIG_THP_SWAP); > > } > > IS_ENABLED(CONFIG_THP_SWAP) doesn't match the name too. It's an option > selected by users. arch_thp_swp_supported() is to report the > capability. Hi Ying, CONFIG_THP_SWAP implicitly includes ARCH_WANTS_THP_SWAP. So it seems a bit odd to have still another arch_wants_thp_swap(). if the name of arch_thp_swp_supported is not sensible to you, will thp_swp_supported() without arch_ make more sense? a similar example is, static inline bool gigantic_page_runtime_supported(void) { return IS_ENABLED(CONFIG_ARCH_HAS_GIGANTIC_PAGE); } Otherwise, can we just keep the code as is according to Anshuman's suggestion? Thanks Barry } > > Best Regards, > Huang, Ying > > >> arm64, > >> > >> static inline bool arch_thp_swp_supported(void) > >> { > >> return IS_ENABLED(CONFIG_THP_SWAP) && !system_supports_mte(); > >> } > >> > >> caller, > >> > >> folio_alloc_swap(struct folio *folio) > >> { > >> > >> if (folio_test_large(folio)) { > >> - if (IS_ENABLED(CONFIG_THP_SWAP)) > >> + if (arch_thp_swp_supported()) > >> get_swap_pages(1, &entry, folio_nr_pages(folio)); > >> goto out; > >> } > >> > >> Thanks > >> Barry