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[89.162.31.138]) by smtp.gmail.com with ESMTPSA id w8-20020ac24428000000b0047fa40b5051sm3189771lfl.248.2022.07.19.06.13.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 19 Jul 2022 06:13:12 -0700 (PDT) Message-ID: Date: Tue, 19 Jul 2022 15:13:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH] regmap: support regmap_field_write() on non-readable fields Content-Language: en-US To: Charles Keepax Cc: Mark Brown , Greg Kroah-Hartman , "Rafael J. Wysocki" , linux-kernel@vger.kernel.org, Srinivas Kandagatla , Kuninori Morimoto , Bjorn Andersson References: <20220719121446.375095-1-krzysztof.kozlowski@linaro.org> <20220719125401.GA92394@ediswmail.ad.cirrus.com> From: Krzysztof Kozlowski In-Reply-To: <20220719125401.GA92394@ediswmail.ad.cirrus.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 19/07/2022 14:54, Charles Keepax wrote: > On Tue, Jul 19, 2022 at 02:14:46PM +0200, Krzysztof Kozlowski wrote: >> Current implementation of regmap_field_write() performs an update of >> register (read+write), therefore it ignores regmap read-restrictions and >> is not suitable for write-only registers (e.g. interrupt clearing). >> >> Extend regmap_field_write() and regmap_field_force_write() to check if >> register is readable and only then perform an update. In the other >> case, it is expected that mask of field covers entire register thus a >> full write is allowed. >> >> Signed-off-by: Krzysztof Kozlowski >> >> --- >> >> Cc: Srinivas Kandagatla >> Cc: Charles Keepax >> Cc: Kuninori Morimoto >> Cc: Bjorn Andersson >> --- >> drivers/base/regmap/regmap.c | 50 ++++++++++++++++++++++++++++++++++++ >> include/linux/regmap.h | 15 ++--------- >> 2 files changed, 52 insertions(+), 13 deletions(-) >> >> diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c >> index 0caa5690c560..4d18a34f7b2c 100644 >> --- a/drivers/base/regmap/regmap.c >> +++ b/drivers/base/regmap/regmap.c >> @@ -2192,6 +2192,56 @@ int regmap_noinc_write(struct regmap *map, unsigned int reg, >> } >> EXPORT_SYMBOL_GPL(regmap_noinc_write); >> >> +static int _regmap_field_write_or_update(struct regmap_field *field, >> + unsigned int val, bool *change, >> + bool async, bool force) >> +{ >> + unsigned int mask = (~0 << field->shift) & field->mask; >> + unsigned int map_val_mask, map_val_mask_h; >> + int ret; >> + >> + if (regmap_readable(field->regmap, field->reg)) >> + return regmap_update_bits_base(field->regmap, field->reg, >> + mask, val << field->shift, >> + change, async, force); >> + > > I think this will break other valid use-cases, regmap_readable (I > believe) returns if the register is physically readable, however > it should still be possible to use update bits if the register is > in the cache even if it can't physically be read. So really you > need to fall into this path if it is readable or in the cache. But what type of real use case this would be trying to solve? Either register is readable or not. The presence of cache is just optimization and does not change the fact that we cannot read from register thus no need to go via updates. > > Which does I guess also raise the question if your problem would > be better solved with caching the register? And how the value would appear in the cache? Since register cannot be read, I expect the cache to be filled on first update. First update would be read+write, so we are stuck again. Best regards, Krzysztof