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[2620:137:e000::1:20]) by mx.google.com with ESMTP id cz20-20020a056870649400b000fb079ca427si12507803oab.228.2022.07.19.09.38.35; Tue, 19 Jul 2022 09:38:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=GBgzepkd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239302AbiGSPtX (ORCPT + 99 others); Tue, 19 Jul 2022 11:49:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239143AbiGSPtV (ORCPT ); Tue, 19 Jul 2022 11:49:21 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D837A599DA; Tue, 19 Jul 2022 08:49:19 -0700 (PDT) Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 26JF18n2006836; Tue, 19 Jul 2022 17:49:08 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=selector1; bh=xNJ4ErN3u9jkwMCarC2DByfr3qT4TwK9Imt9o2bL5z0=; b=GBgzepkdJdsFAckF9I/WRy8sXMFk7VCCjo7Y7HRdF1F76W5b6gsikNP3c+7PLlUGZoQP DgKLybIfd/dd/XzIrk7sodntJHPa/do2UvuMDiPJHd/9cI4cUdBQIMYAqv1i+sQE0rSM 3ViMAILa5kcIyZmUn6VvAB2B0EzexNri17aJD3gV0DtHvylzakv8JM92s1oXpCSr8aS9 EAcEtUe5fybPg1YAt6w/dO1PR9nT/rC3OQUoLIlKBhJoa6LatC/j341H4yooZDIksZTz 72/e/3Qoq0bcwb8kne9yJdBvA/dj3BJa9ovKz/CWwa4zepmuyuSK3Ikh5/T38E++IslD 9w== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3hbnp60r8v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Jul 2022 17:49:08 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 09E6610002A; Tue, 19 Jul 2022 17:49:08 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 0502522D17D; Tue, 19 Jul 2022 17:49:08 +0200 (CEST) Received: from [10.201.20.208] (10.75.127.44) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Tue, 19 Jul 2022 17:49:04 +0200 Message-ID: <011c1254-f3e9-f363-52a5-c71f7b5a2805@foss.st.com> Date: Tue, 19 Jul 2022 17:49:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH v3 0/6] STM32 DMA-MDMA chaining feature Content-Language: en-US To: Jonathan Corbet , Vinod Koul , Maxime Coquelin , Alexandre Torgue CC: , , , , , Marek Vasut References: <20220719153122.620730-1-amelie.delaunay@foss.st.com> From: Amelie Delaunay In-Reply-To: <20220719153122.620730-1-amelie.delaunay@foss.st.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-19_04,2022-07-19_01,2022-06-22_01 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,NICE_REPLY_A,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Please drop this malformed patchset, I'll send a new one. On 7/19/22 17:31, Amelie Delaunay wrote: > This patchset (re)introduces STM32 DMA-MDMA chaining feature. > > As the DMA is not able to generate convenient burst transfer on the DDR, > it penalises the AXI bus when accessing the DDR. While it accesses > optimally the SRAM. The DMA-MDMA chaining then consists in having an SRAM > buffer between DMA and MDMA, so the DMA deals with peripheral and SRAM, > and the MDMA with SRAM and DDR. > > The feature relies on the fact that DMA channel Transfer Complete signal > can trigger a MDMA channel transfer and MDMA can clear the DMA request by > writing to DMA Interrupt Clear register. > > A deeper introduction can be found in patch 1. > > Previous implementation [1] has been dropped as nacked. > Unlike this previous implementation (where all the stuff was embedded in > stm32-dma driver), the user (in peripheral drivers using dma) has now to > configure the MDMA channel. > > [1] https://lore.kernel.org/lkml/1538139715-24406-1-git-send-email-pierre-yves.mordret@st.com/ > > Changes in v3: > - introduce two prior patches to help readibility > - fix stm32-dma struct stm32_dma_mdma_config documentation > > Changes in v2: > - wrap to 80-column limit for documentation > - add an entry for this documentation in index.rst > - use simple table instead of csv-table in documentation > > > Amelie Delaunay (6): > dmaengine: stm32-dma: introduce 3 helpers to address channel flags > dmaengine: stm32-dma: use bitfield helpers > docs: arm: stm32: introduce STM32 DMA-MDMA chaining feature > dmaengine: stm32-dmamux: set dmamux channel id in dma features > bitfield > dmaengine: stm32-dma: add support to trigger STM32 MDMA > dmaengine: stm32-mdma: add support to be triggered by STM32 DMA > > Documentation/arm/index.rst | 1 + > .../arm/stm32/stm32-dma-mdma-chaining.rst | 415 ++++++++++++++++++ > drivers/dma/stm32-dma.c | 136 +++--- > drivers/dma/stm32-dmamux.c | 2 +- > drivers/dma/stm32-mdma.c | 70 ++- > 5 files changed, 569 insertions(+), 55 deletions(-) > create mode 100644 Documentation/arm/stm32/stm32-dma-mdma-chaining.rst >