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Date:   Tue, 19 Jul 2022 19:11:44 +0000
From:   Sean Christopherson <seanjc@google.com>
To:     Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc:     linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        pbonzini@redhat.com, mlevitsk@redhat.com, jon.grimm@amd.com
Subject: Re: [PATCH] KVM: SVM: Fix x2APIC MSRs interception
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References: <20220718083833.222117-1-suravee.suthikulpanit@amd.com>
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On Mon, Jul 18, 2022, Suravee Suthikulpanit wrote:
> The index for svm_direct_access_msrs was incorrectly initialized with
> the APIC MMIO register macros. Fix by introducing a macro for calculating
> x2APIC MSRs.
> 
> Fixes: 5c127c85472c ("KVM: SVM: Adding support for configuring x2APIC MSRs interception")
> Cc: Maxim Levitsky <mlevitsk@redhat.com>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> ---
>  arch/x86/kvm/svm/svm.c | 52 ++++++++++++++++++++++--------------------
>  1 file changed, 27 insertions(+), 25 deletions(-)
> 
> diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
> index ba81a7e58f75..aef63aae922d 100644
> --- a/arch/x86/kvm/svm/svm.c
> +++ b/arch/x86/kvm/svm/svm.c
> @@ -74,6 +74,8 @@ static uint64_t osvw_len = 4, osvw_status;
>  
>  static DEFINE_PER_CPU(u64, current_tsc_ratio);
>  
> +#define X2APIC_MSR(x)	(APIC_BASE_MSR + (x >> 4))

Once this hits kvm/queue, I'll send a follow-up series to move X2APIC_MSR() to
arch/x86/include/asm/apicdef.h.  Non-KVM APIC support open code the calculation
in multiple places, and both VMX and SVM now have their own definitions.