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Date:   Tue, 19 Jul 2022 19:23:20 +0000
From:   Sean Christopherson <seanjc@google.com>
To:     Sagi Shahar <sagis@google.com>
Cc:     Isaku Yamahata <isaku.yamahata@gmail.com>,
        "Yamahata, Isaku" <isaku.yamahata@intel.com>, kvm@vger.kernel.org,
        linux-kernel@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
        Erdem Aktas <erdemaktas@google.com>
Subject: Re: [RFC PATCH v6 090/104] KVM: TDX: Handle TDX PV CPUID hypercall
Message-ID: <YtcEqMtjAHQ61ZR9@google.com>
References: <cover.1651774250.git.isaku.yamahata@intel.com>
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 <20220629101356.GA882746@ls.amr.corp.intel.com>
 <CAAhR5DF82HO4yEmOjywXXR-_wcXT7hctib2yfRaS-nb6sGPsLw@mail.gmail.com>
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On Mon, Jul 18, 2022, Sagi Shahar wrote:
> On Wed, Jun 29, 2022 at 3:14 AM Isaku Yamahata <isaku.yamahata@gmail.com> wrote:
> >
> > On Tue, Jun 14, 2022 at 11:15:00AM -0700,
> > Sagi Shahar <sagis@google.com> wrote:
> >
> > > On Thu, May 5, 2022 at 11:16 AM <isaku.yamahata@intel.com> wrote:
> > > >
> > > > From: Isaku Yamahata <isaku.yamahata@intel.com>
> > > >
> > > > Wire up TDX PV CPUID hypercall to the KVM backend function.
> > > >
> > > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> > > > ---
> > > >  arch/x86/kvm/vmx/tdx.c | 22 ++++++++++++++++++++++
> > > >  1 file changed, 22 insertions(+)
> > > >
> > > > diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c
> > > > index 9c712f661a7c..c7cdfee397ec 100644
> > > > --- a/arch/x86/kvm/vmx/tdx.c
> > > > +++ b/arch/x86/kvm/vmx/tdx.c
> > > > @@ -946,12 +946,34 @@ static int tdx_emulate_vmcall(struct kvm_vcpu *vcpu)
> > > >         return 1;
> > > >  }
> > > >
> > > > +static int tdx_emulate_cpuid(struct kvm_vcpu *vcpu)
> > > > +{
> > > > +       u32 eax, ebx, ecx, edx;
> > > > +
> > > > +       /* EAX and ECX for cpuid is stored in R12 and R13. */
> > > > +       eax = tdvmcall_a0_read(vcpu);
> > > > +       ecx = tdvmcall_a1_read(vcpu);
> > > > +
> > > > +       kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
> > >
> > > According to the GHCI spec section 3.6
> > > (TDG.VP.VMCALL<Instruction.CPUID>) we should return
> > > VMCALL_INVALID_OPERAND if an invalid CPUID is requested.
> > >
> > > kvm_cpuid already returns false in this case so we should use that
> > > return value to set the tdvmcall return code in case of invalid leaf.
> >
> > Based on CPUID instruction, cpuid results in #UD when lock prefix is used or
> > earlier CPU that doesn't support cpuid instruction.
> > So I'm not sure what CPUID input result in INVALID_OPERAND error.
> > Does the following make sense for you?
> >
> > --- a/arch/x86/kvm/vmx/tdx.c
> > +++ b/arch/x86/kvm/vmx/tdx.c
> > @@ -1347,7 +1347,7 @@ static int tdx_emulate_cpuid(struct kvm_vcpu *vcpu)
> >         eax = tdvmcall_a0_read(vcpu);
> >         ecx = tdvmcall_a1_read(vcpu);
> >
> > -       kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
> > +       kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, false);

Barring new verbiage in the GHCI, this change is correct.  CPUID behavior is
different for AMD vs. Intel, but the behavior is architectural and well-defined
for each vendor.  KVM handles this by emulating the AMD vs. Intel behavior based
on the configured vCPU model.

Forcing an exact match would make TDX follow AMD behavior, not Intel behavior.

> >         tdvmcall_a0_write(vcpu, eax);
> >         tdvmcall_a1_write(vcpu, ebx);
> >
> > thanks,
> 
> If any CPUID request is considered valid, then perhaps the spec itself
> needs to be updated.

Agreed.  Documenting that "Invalid CPUID requested" is a legal return value implies
that TDX is creating a _third_ variant of CPUID behavior.  Dropping the error return
seems like the simplest approach, unless it was added for a specific reason?