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Date:   Tue, 19 Jul 2022 15:57:53 -0700
From:   Dan Williams <dan.j.williams@intel.com>
To:     <ira.weiny@intel.com>, Dan Williams <dan.j.williams@intel.com>,
        "Bjorn Helgaas" <bhelgaas@google.com>,
        Jonathan Cameron <Jonathan.Cameron@huawei.com>
CC:     Ira Weiny <ira.weiny@intel.com>, Lukas Wunner <lukas@wunner.de>,
        "Alison Schofield" <alison.schofield@intel.com>,
        Vishal Verma <vishal.l.verma@intel.com>,
        Dave Jiang <dave.jiang@intel.com>,
        Ben Widawsky <bwidawsk@kernel.org>,
        <linux-kernel@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
        <linux-pci@vger.kernel.org>
Subject: RE: [PATCH V16 0/6] CXL: Read CDAT
Message-ID: <62d736f123b7c_11a166294fb@dwillia2-xfh.jf.intel.com.notmuch>
References: <20220719205249.566684-1-ira.weiny@intel.com>
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ira.weiny@ wrote:
> From: Ira Weiny <ira.weiny@intel.com>
> 
> 
> Details of changes are in the individual patches.
> 
> Major changes from V14:[11]
> 	Pick up Dan's V15 version of the CDAT patch
> 	Fix up 3/7 with Jonathans cleanups
> 	Drop valid check patch and deffer to ACPI vailidation later
> 
> CXL drivers need various data which are provided through generic DOE mailboxes
> as defined in the PCIe 6.0 spec.[1]
> 
> One such data is the Coherent Device Attribute Table (CDAT).  CDAT data provides
> coherent information about the various devices in the system.  It was developed
> because systems no longer have a priori knowledge of all coherent devices
> within a system.  CDAT describes the coherent characteristics of the
> components on the CXL bus separate from system configurations.  The OS can
> then, for example, use this information to form correct interleave sets.
> 
> To begin reading the CDAT the OS must have support to access the DOE mailboxes
> provided by the CXL devices.
> 
> Because DOE is not specific to DOE but is provided within the PCI spec, the
> series adds PCI DOE capability library functions.  These functions allow for
> the iteration of the DOE capabilities on a device as well as creating
> pci_doe_mb structures which can control the operation of the DOE state machine.
> 
> For now the iteration of and storage of the DOE mailboxes is done on memdev
> objects within the CXL stack.  When this is needed in more generic code this
> can be lifted later.
> 
> This work was tested using qemu.

Looks good Ira, thanks for sticking with it, thanks Jonathan for getting
it started and all the review plus test environment, and thanks Bjorn
for the help steering this away from an aux-bus mistake. All applied and
soaking on cxl/pending, but will move to cxl/next shortly.