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In-Reply-To: <1652866528-13220-2-git-send-email-hongxing.zhu@nxp.com>
From:   Tim Harvey <tharvey@gateworks.com>
Date:   Tue, 19 Jul 2022 17:59:07 -0700
Message-ID: <CAJ+vNU0FM_zs9nQ6rX=xNJzsgaH=5WOeNDNCS9rs5VF2Av5eRQ@mail.gmail.com>
Subject: Re: [RFC 2/2] PCI: imx6: Support more than Gen2 speed link mode
To:     Richard Zhu <hongxing.zhu@nxp.com>
Cc:     Lucas Stach <l.stach@pengutronix.de>,
        "bhelgaas@google.com" <bhelgaas@google.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Fabio Estevam <festevam@gmail.com>, linux-pci@vger.kernel.org,
        Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
        open list <linux-kernel@vger.kernel.org>,
        Sascha Hauer <kernel@pengutronix.de>,
        NXP Linux Team <linux-imx@nxp.com>
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On Wed, May 18, 2022 at 2:49 AM Richard Zhu <hongxing.zhu@nxp.com> wrote:
>
> Support more than Gen2 speed link mode, since i.MX8MP PCIe supports up
> to Gen3 link speed.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 30641d2dda14..37012f9a33a0 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -809,8 +809,8 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
>
>         dw_pcie_wait_for_link(pci);
>
> -       if (pci->link_gen == 2) {
> -               /* Allow Gen2 mode after the link is up. */
> +       if (pci->link_gen > 1) {
> +               /* Allow faster modes after the link is up. */
>                 dw_pcie_dbi_ro_wr_en(pci);
>                 tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
>                 tmp &= ~PCI_EXP_LNKCAP_SLS;
> --

Richard,

I noticed that your imx8mp pcie series [1] will force the imx8mp to
link only at gen1 speeds unless support like the above is added. I
believe you would also need the following:
-               tmp |= PCI_EXP_LNKCAP_SLS_5_0GB;
+               tmp |= pci->link_gen;

When I used this along with your imx8mp series however I only get a gen1 link.

Have you made any progress on a v3 of your imx8mp series?

Do you know if the downstream NXP vendor kernel [2] supports imx8mp Gen3 links?

Best Regards,

Tim
[1] https://patchwork.kernel.org/project/linux-pci/list/?series=620887&state=*
[2] https://source.codeaurora.org/external/imx/linux-imx/