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From:   <Conor.Dooley@microchip.com>
To:     <sboyd@kernel.org>
CC:     <palmer@dabbelt.com>, <robh+dt@kernel.org>,
        <Daire.McNamara@microchip.com>, <paul.walmsley@sifive.com>,
        <aou@eecs.berkeley.edu>, <linux-clk@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <p.zabel@pengutronix.de>,
        <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <mturquette@baylibre.com>
Subject: Re: [PATCH v2 00/12] PolarFire SoC reset controller & clock cleanups
Thread-Topic: [PATCH v2 00/12] PolarFire SoC reset controller & clock cleanups
Thread-Index: AQHYj5/vIrxOVV1EL0SoHOsgiQHkyK2HXw2A
Date:   Wed, 20 Jul 2022 13:46:25 +0000
Message-ID: <ee72b966-433d-ae9e-4544-44ad1fd1abad@microchip.com>
References: <20220704121558.2088698-1-conor.dooley@microchip.com>
In-Reply-To: <20220704121558.2088698-1-conor.dooley@microchip.com>
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