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[2620:137:e000::1:20]) by mx.google.com with ESMTP id o5-20020a17090ac70500b001c73b8066e0si1734134pjt.74.2022.07.21.03.39.40; Thu, 21 Jul 2022 03:39:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233271AbiGUK2G (ORCPT + 99 others); Thu, 21 Jul 2022 06:28:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54988 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233276AbiGUK14 (ORCPT ); Thu, 21 Jul 2022 06:27:56 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 904E2823BC; Thu, 21 Jul 2022 03:27:53 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D53E71042; Thu, 21 Jul 2022 03:27:53 -0700 (PDT) Received: from [10.57.41.123] (unknown [10.57.41.123]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2475C3F70D; Thu, 21 Jul 2022 03:27:49 -0700 (PDT) Message-ID: <0b493b49-2657-ad5d-465e-d80b62820613@arm.com> Date: Thu, 21 Jul 2022 11:27:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH v2 00/13] coresight: Add new API to allocate trace source ID values Content-Language: en-US To: Mike Leach Cc: mathieu.poirier@linaro.org, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, linux-perf-users@vger.kernel.org, quic_jinlmao@quicinc.com, suzuki.poulose@arm.com, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20220704081149.16797-1-mike.leach@linaro.org> From: James Clark In-Reply-To: <20220704081149.16797-1-mike.leach@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00,NICE_REPLY_A, RCVD_IN_DNSWL_HI,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/07/2022 09:11, Mike Leach wrote: > The current method for allocating trace source ID values to sources is > to use a fixed algorithm for CPU based sources of (cpu_num * 2 + 0x10). > The STM is allocated ID 0x1. > > This fixed algorithm is used in both the CoreSight driver code, and by > perf when writing the trace metadata in the AUXTRACE_INFO record. > > The method needs replacing as currently:- > 1. It is inefficient in using available IDs. > 2. Does not scale to larger systems with many cores and the algorithm > has no limits so will generate invalid trace IDs for cpu number > 44. > > Additionally requirements to allocate additional system IDs on some > systems have been seen. > > This patch set introduces an API that allows the allocation of trace IDs > in a dynamic manner. I've tested this with various commands like with per-thread mode, attaching, running the tests and also Carsten's new tests. Apart from the possible backwards compatibility issue and the minor code comments it looks good to me. > > Architecturally reserved IDs are never allocated, and the system is > limited to allocating only valid IDs. > > Each of the current trace sources ETM3.x, ETM4.x and STM is updated to use > the new API. > > For the ETMx.x devices IDs are allocated on certain events > a) When using sysfs, an ID will be allocated on hardware enable, or a read of > sysfs TRCTRACEID register and freed when the sysfs reset is written. > > b) When using perf, ID is allocated on hardware enable, and freed on > hardware disable. IDs are communicated using the AUX_OUTPUT_HW_ID packet. > The ID allocator is notified when perf sessions start and stop > so CPU based IDs are kept constant throughout any perf session. > > > Note: This patchset breaks backward compatibility for perf record and > perf report. > > Because the method for generating the AUXTRACE_INFO meta data has > changed, using an older perf record will result in metadata that > does not match the trace IDs used in the recorded trace data. > This mismatch will cause subsequent decode to fail. > > The version of the AUXTRACE_INFO has been updated to reflect the fact that > the trace source IDs are no longer present in the metadata. This will > mean older versions of perf report cannot decode the file. > > Applies to coresight/next [c06475910b52] > Tested on DB410c > > Changes since v1: > (after feedback & discussion with Mathieu & Suzuki). > > 1) API has changed. The global trace ID map is managed internally, so it > is no longer passed in to the API functions. > > 2) perf record does not use sysfs to find the trace IDs. These are now > output as AUX_OUTPUT_HW_ID events. The drivers, perf record, and perf report > have been updated accordingly to generate and handle these events. > > Mike Leach (13): > coresight: trace-id: Add API to dynamically assign Trace ID values > coresight: trace-id: update CoreSight core to use Trace ID API > coresight: stm: Update STM driver to use Trace ID API > coresight: etm4x: Update ETM4 driver to use Trace ID API > coresight: etm3x: Update ETM3 driver to use Trace ID API > coresight: etmX.X: stm: Remove unused legacy source Trace ID ops > coresight: perf: traceid: Add perf notifiers for Trace ID > perf: cs-etm: Move mapping of Trace ID and cpu into helper function > perf: cs-etm: Update record event to use new Trace ID protocol > kernel: events: Export perf_report_aux_output_id() > perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet > coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID > coresight: trace-id: Add debug & test macros to Trace ID allocation > > drivers/hwtracing/coresight/Makefile | 2 +- > drivers/hwtracing/coresight/coresight-core.c | 49 +--- > .../hwtracing/coresight/coresight-etm-perf.c | 17 ++ > drivers/hwtracing/coresight/coresight-etm.h | 3 +- > .../coresight/coresight-etm3x-core.c | 85 +++--- > .../coresight/coresight-etm3x-sysfs.c | 28 +- > .../coresight/coresight-etm4x-core.c | 65 ++++- > .../coresight/coresight-etm4x-sysfs.c | 32 ++- > drivers/hwtracing/coresight/coresight-etm4x.h | 3 + > drivers/hwtracing/coresight/coresight-stm.c | 49 +--- > .../hwtracing/coresight/coresight-trace-id.c | 263 ++++++++++++++++++ > .../hwtracing/coresight/coresight-trace-id.h | 65 +++++ > include/linux/coresight-pmu.h | 31 ++- > include/linux/coresight.h | 3 - > kernel/events/core.c | 1 + > tools/include/linux/coresight-pmu.h | 31 ++- > tools/perf/arch/arm/util/cs-etm.c | 21 +- > .../perf/util/cs-etm-decoder/cs-etm-decoder.c | 9 + > tools/perf/util/cs-etm.c | 220 +++++++++++++-- > tools/perf/util/cs-etm.h | 14 +- > 20 files changed, 784 insertions(+), 207 deletions(-) > create mode 100644 drivers/hwtracing/coresight/coresight-trace-id.c > create mode 100644 drivers/hwtracing/coresight/coresight-trace-id.h >