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To:     Sean Anderson <sean.anderson@seco.com>,
        "David S . Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>,
        Madalin Bucur <madalin.bucur@nxp.com>,
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CC:     Paolo Abeni <pabeni@redhat.com>,
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        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        Russell King <linux@armlinux.org.uk>,
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        Sean Anderson <sean.anderson@seco.com>,
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        Benjamin Herrenschmidt <benh@kernel.crashing.org>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Ioana Ciornei <ioana.ciornei@nxp.com>,
        Jonathan Corbet <corbet@lwn.net>,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Leo Li <leoyang.li@nxp.com>,
        Michael Ellerman <mpe@ellerman.id.au>,
        Paul Mackerras <paulus@samba.org>,
        Rob Herring <robh+dt@kernel.org>,
        Shawn Guo <shawnguo@kernel.org>, Vinod Koul <vkoul@kernel.org>,
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        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
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        "linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>
Subject: RE: [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink
Thread-Topic: [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink
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Date:   Thu, 21 Jul 2022 14:26:24 +0000
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> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 0:59
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>; Alexandru Marginean
> <alexandru.marginean@nxp.com>; Andrew Lunn <andrew@lunn.ch>;
> Benjamin Herrenschmidt <benh@kernel.crashing.org>; Heiner Kallweit
> <hkallweit1@gmail.com>; Ioana Ciornei <ioana.ciornei@nxp.com>; Jonathan
> Corbet <corbet@lwn.net>; Kishon Vijay Abraham I <kishon@ti.com>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
> <leoyang.li@nxp.com>; Michael Ellerman <mpe@ellerman.id.au>; Paul
> Mackerras <paulus@samba.org>; Rob Herring <robh+dt@kernel.org>;
> Shawn Guo <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
> Vladimir Oltean <olteanv@gmail.com>; devicetree@vger.kernel.org; linux-
> doc@vger.kernel.org; linux-phy@lists.infradead.org; linuxppc-
> dev@lists.ozlabs.org
> Subject: [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink
>=20
> This series converts the DPAA driver to phylink. Additionally,
> it also adds a serdes driver to allow for dynamic reconfiguration
> between 1g and 10g interfaces (such as in an SFP+ slot). These changes
> are submitted together for this RFT, but they will eventually be
> submitted separately to the appropriate subsystem maintainers.
>=20
> I have tried to maintain backwards compatibility with existing device
> trees whereever possible. However, one area where I was unable to
> achieve this was with QSGMII. Please refer to patch 4 for details.
>=20
> All mac drivers have now been converted. I would greatly appreciate if
> anyone has QorIQ boards they can test/debug this series on. I only have a=
n
> LS1046ARDB. Everything but QSGMII should work without breakage; QSGMII
> needs patches 42 and 43.
>=20
> The serdes driver is mostly functional (except for XFI). This series
> only adds support for the LS1046ARDB SerDes (and untested LS1088ARDB),
> but it should be fairly straightforward to add support for other SoCs
> and boards (see Documentation/driver-api/phy/qoriq.rst).
>=20
> This is the last spin of this series with all patches included. After nex=
t
> week (depending on feedback) I will resend the patches broken up as
> follows:
> - 5: 1000BASE-KX support
> - 1, 6, 44, 45: Lynx 10G support
> - 7-10, 12-14: Phy rate adaptation support
> - 2-4, 15-43, 46, 47: DPAA phylink conversion

Please also send patches 15-38 separately from the DPAA1 SerDes and phylink=
 set for easier review

> Patches 15-19 were first submitted as [1].
>=20
> [1] https://lore.kernel.org/netdev/20220531195851.1592220-1-sean.anderson=
@seco.com/
>=20
> Changes in v3:
> - Manually expand yaml references
> - Add mode configuration to device tree
> - Expand pcs-handle to an array
> - Incorperate some minor changes into the first FMan binding commit
> - Add vendor prefix 'fsl,' to rgmii and mii properties.
> - Set maxItems for pcs-names
> - Remove phy-* properties from example because dt-schema complains and
> I
>   can't be bothered to figure out how to make it work.
> - Add pcs-handle as a preferred version of pcsphy-handle
> - Deprecate pcsphy-handle
> - Remove mii/rmii properties
> - Add 1000BASE-KX interface mode
> - Rename remaining references to QorIQ SerDes to Lynx 10G
> - Fix PLL enable sequence by waiting for our reset request to be cleared
>   before continuing. Do the same for the lock, even though it isn't as
>   critical. Because we will delay for 1.5ms on average, use prepare
>   instead of enable so we can sleep.
> - Document the status of each protocol
> - Fix offset of several bitfields in RECR0
> - Take into account PLLRST_B, SDRST_B, and SDEN when considering whether
>   a PLL is "enabled."
> - Only power off unused lanes.
> - Split mode lane mask into first/last lane (like group)
> - Read modes from device tree
> - Use caps to determine whether KX/KR are supported
> - Move modes to lynx_priv
> - Ensure that the protocol controller is not already in-use when we try
>   to configure a new mode. This should only occur if the device tree is
>   misconfigured (e.g. when QSGMII is selected on two lanes but there is
>   only one QSGMII controller).
> - Split PLL drivers off into their own file
> - Add clock for "ext_dly" instead of writing the bit directly (and
>   racing with any clock code).
> - Use kasprintf instead of open-coding the snprintf dance
> - Support 1000BASE-KX in lynx_lookup_proto. This still requires PCS
>   support, so nothing is truly "enabled" yet.
> - Add support for phy rate adaptation
> - Support differing link speeds and interface speeds
> - Adjust advertisement based on rate adaptation
> - Adjust link settings based on rate adaptation
> - Add support for CRS-based rate adaptation
> - Add support for AQR115
> - Add some additional phy interfaces
> - Add support for aquantia rate adaptation
> - Put the PCS mdiodev only after we are done with it (since the PCS
>   does not perform a get itself).
> - Remove _return label from memac_initialization in favor of returning
>   directly
> - Fix grabbing the default PCS not checking for -ENODATA from
>   of_property_match_string
> - Set DTSEC_ECNTRL_R100M in dtsec_link_up instead of dtsec_mac_config
> - Remove rmii/mii properties
> - Replace 1000Base... with 1000BASE... to match IEEE capitalization
> - Add compatibles for QSGMII PCSs
> - Split arm and powerpcs dts updates
> - Describe modes in device tree
> - ls1088a: Add serdes bindings
>=20
> Changes in v2:
> - Rename to fsl,lynx-10g.yaml
> - Refer to the device in the documentation, rather than the binding
> - Move compatible first
> - Document phy cells in the description
> - Allow a value of 1 for phy-cells. This allows for compatibility with
>   the similar (but according to Ioana Ciornei different enough) lynx-28g
>   binding.
> - Remove minItems
> - Use list for clock-names
> - Fix example binding having too many cells in regs
> - Add #clock-cells. This will allow using assigned-clocks* to configure
>   the PLLs.
> - Document the structure of the compatible strings
> - Convert FMan MAC bindings to yaml
> - Better document how we select which PCS to use in the default case
> - Rename driver to Lynx 10G (etc.)
> - Fix not clearing group->pll after disabling it
> - Support 1 and 2 phy-cells
> - Power off lanes during probe
> - Clear SGMIIaCR1_PCS_EN during probe
> - Rename LYNX_PROTO_UNKNOWN to LYNX_PROTO_NONE
> - Handle 1000BASE-KX in lynx_proto_mode_prep
> - Remove some unused variables
> - Fix prototype for dtsec_initialization
> - Fix warning if sizeof(void *) !=3D sizeof(resource_size_t)
> - Specify type of mac_dev for exception_cb
> - Add helper for sanity checking cgr ops
> - Add CGR update function
> - Adjust queue depth on rate change
> - Move PCS_LYNX dependency to fman Kconfig
> - Remove unused variable slow_10g_if
> - Restrict valid link modes based on the phy interface. This is easier
>   to set up, and mostly captures what I intended to do the first time.
>   We now have a custom validate which restricts half-duplex for some SoCs
>   for RGMII, but generally just uses the default phylink validate.
> - Configure the SerDes in enable/disable
> - Properly implement all ethtool ops and ioctls. These were mostly
>   stubbed out just enough to compile last time.
> - Convert 10GEC and dTSEC as well
> - Fix capitalization of mEMAC in commit messages
> - Add nodes for QSGMII PCSs
> - Add nodes for QSGMII PCSs
> - Use one phy cell for SerDes1, since no lanes can be grouped
> - Disable SerDes by default to prevent breaking boards inadvertently.
>=20
> Sean Anderson (47):
>   dt-bindings: phy: Add Lynx 10G phy binding
>   dt-bindings: net: Expand pcs-handle to an array
>   dt-bindings: net: Convert FMan MAC bindings to yaml
>   dt-bindings: net: fman: Add additional interface properties
>   net: phy: Add 1000BASE-KX interface mode
>   [RFT] phy: fsl: Add Lynx 10G SerDes driver
>   net: phy: Add support for rate adaptation
>   net: phylink: Support differing link speeds and interface speeds
>   net: phylink: Adjust advertisement based on rate adaptation
>   net: phylink: Adjust link settings based on rate adaptation
>   [RFC] net: phylink: Add support for CRS-based rate adaptation
>   net: phy: aquantia: Add support for AQR115
>   net: phy: aquantia: Add some additional phy interfaces
>   net: phy: aquantia: Add support for rate adaptation
>   net: fman: Convert to SPDX identifiers
>   net: fman: Don't pass comm_mode to enable/disable
>   net: fman: Store en/disable in mac_device instead of mac_priv_s
>   net: fman: dtsec: Always gracefully stop/start
>   net: fman: Get PCS node in per-mac init
>   net: fman: Store initialization function in match data
>   net: fman: Move struct dev to mac_device
>   net: fman: Configure fixed link in memac_initialization
>   net: fman: Export/rename some common functions
>   net: fman: memac: Use params instead of priv for max_speed
>   net: fman: Move initialization to mac-specific files
>   net: fman: Mark mac methods static
>   net: fman: Inline several functions into initialization
>   net: fman: Remove internal_phy_node from params
>   net: fman: Map the base address once
>   net: fman: Pass params directly to mac init
>   net: fman: Use mac_dev for some params
>   net: fman: Specify type of mac_dev for exception_cb
>   net: fman: Clean up error handling
>   net: fman: Change return type of disable to void
>   net: dpaa: Use mac_dev variable in dpaa_netdev_init
>   soc: fsl: qbman: Add helper for sanity checking cgr ops
>   soc: fsl: qbman: Add CGR update function
>   net: dpaa: Adjust queue depth on rate change
>   net: fman: memac: Add serdes support
>   net: fman: memac: Use lynx pcs driver
>   [RFT] net: dpaa: Convert to phylink
>   powerpc: dts: qoriq: Add nodes for QSGMII PCSs
>   arm64: dts: layerscape: Add nodes for QSGMII PCSs
>   arm64: dts: ls1046a: Add serdes bindings
>   arm64: dts: ls1088a: Add serdes bindings
>   arm64: dts: ls1046ardb: Add serdes bindings
>   [WIP] arm64: dts: ls1088ardb: Add serdes bindings
>=20
>  .../bindings/net/dsa/renesas,rzn1-a5psw.yaml  |    1 +
>  .../bindings/net/ethernet-controller.yaml     |   10 +-
>  .../bindings/net/fsl,fman-dtsec.yaml          |  172 +++
>  .../bindings/net/fsl,qoriq-mc-dpmac.yaml      |    2 +-
>  .../devicetree/bindings/net/fsl-fman.txt      |  133 +-
>  .../devicetree/bindings/phy/fsl,lynx-10g.yaml |  311 ++++
>  Documentation/driver-api/phy/index.rst        |    1 +
>  Documentation/driver-api/phy/lynx_10g.rst     |   73 +
>  MAINTAINERS                                   |    6 +
>  .../boot/dts/freescale/fsl-ls1043-post.dtsi   |   24 +
>  .../boot/dts/freescale/fsl-ls1046-post.dtsi   |   25 +
>  .../boot/dts/freescale/fsl-ls1046a-rdb.dts    |   34 +
>  .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi |  179 +++
>  .../boot/dts/freescale/fsl-ls1088a-rdb.dts    |   87 ++
>  .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi |   96 ++
>  .../fsl/qoriq-fman3-0-10g-0-best-effort.dtsi  |    3 +-
>  .../boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi     |   10 +-
>  .../fsl/qoriq-fman3-0-10g-1-best-effort.dtsi  |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi     |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi      |    3 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi      |    3 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi     |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi     |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi      |    3 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi      |    3 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi      |   10 +-
>  drivers/net/ethernet/freescale/dpaa/Kconfig   |    4 +-
>  .../net/ethernet/freescale/dpaa/dpaa_eth.c    |  132 +-
>  .../ethernet/freescale/dpaa/dpaa_eth_sysfs.c  |    2 +-
>  .../ethernet/freescale/dpaa/dpaa_ethtool.c    |   90 +-
>  drivers/net/ethernet/freescale/fman/Kconfig   |    4 +-
>  drivers/net/ethernet/freescale/fman/fman.c    |   31 +-
>  drivers/net/ethernet/freescale/fman/fman.h    |   31 +-
>  .../net/ethernet/freescale/fman/fman_dtsec.c  |  674 ++++-----
>  .../net/ethernet/freescale/fman/fman_dtsec.h  |   58 +-
>  .../net/ethernet/freescale/fman/fman_keygen.c |   29 +-
>  .../net/ethernet/freescale/fman/fman_keygen.h |   29 +-
>  .../net/ethernet/freescale/fman/fman_mac.h    |   34 +-
>  .../net/ethernet/freescale/fman/fman_memac.c  |  864 +++++------
>  .../net/ethernet/freescale/fman/fman_memac.h  |   57 +-
>  .../net/ethernet/freescale/fman/fman_muram.c  |   31 +-
>  .../net/ethernet/freescale/fman/fman_muram.h  |   32 +-
>  .../net/ethernet/freescale/fman/fman_port.c   |   29 +-
>  .../net/ethernet/freescale/fman/fman_port.h   |   29 +-
>  drivers/net/ethernet/freescale/fman/fman_sp.c |   29 +-
>  drivers/net/ethernet/freescale/fman/fman_sp.h |   28 +-
>  .../net/ethernet/freescale/fman/fman_tgec.c   |  274 ++--
>  .../net/ethernet/freescale/fman/fman_tgec.h   |   54 +-
>  drivers/net/ethernet/freescale/fman/mac.c     |  653 +--------
>  drivers/net/ethernet/freescale/fman/mac.h     |   66 +-
>  drivers/net/phy/aquantia_main.c               |   86 +-
>  drivers/net/phy/phy.c                         |   21 +
>  drivers/net/phy/phylink.c                     |  161 +-
>  drivers/phy/freescale/Kconfig                 |   20 +
>  drivers/phy/freescale/Makefile                |    3 +
>  drivers/phy/freescale/lynx-10g.h              |   36 +
>  drivers/phy/freescale/phy-fsl-lynx-10g-clk.c  |  438 ++++++
>  drivers/phy/freescale/phy-fsl-lynx-10g.c      | 1297 +++++++++++++++++
>  drivers/soc/fsl/qbman/qman.c                  |   76 +-
>  include/linux/phy.h                           |   42 +
>  include/linux/phylink.h                       |   12 +-
>  include/soc/fsl/qman.h                        |    9 +
>  69 files changed, 4408 insertions(+), 2356 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-
> dtsec.yaml
>  create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-
> 10g.yaml
>  create mode 100644 Documentation/driver-api/phy/lynx_10g.rst
>  create mode 100644 drivers/phy/freescale/lynx-10g.h
>  create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
>  create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g.c
>=20
> --
> 2.35.1.1320.gc452695387.dirty