Received: by 2002:ac0:da4c:0:0:0:0:0 with SMTP id a12csp851736imi; Thu, 21 Jul 2022 12:13:57 -0700 (PDT) X-Google-Smtp-Source: AGRyM1sXTTrgtSv0SkWBnCMEL8WDZa9Sx4pkH3Ps17JqinoG5S6HQlI8UdMaIlJSXjJwko+4cuWO X-Received: by 2002:a63:121a:0:b0:41a:6792:31e5 with SMTP id h26-20020a63121a000000b0041a679231e5mr7837703pgl.69.1658430836854; Thu, 21 Jul 2022 12:13:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1658430836; cv=none; d=google.com; s=arc-20160816; b=HfvlPVmzP7z+OuB/94Jl1Usm+OlE5AFEdk5aFbR4OXchWB6/6Fk5Wc8F1lS3qRCbyP PPD8FSDH4MvpNOFgbOc7TWekNitU4tYOChP48ZrFszoT7DVz/2NhG4rSlQKbkPpxSzRQ c8w4cGKlH/6pLCJITm0SCdEVTrZ9Gi684vhqW1lFx4lGRhq1m+/M/rHvEUSADlS0slYE a0VRF4z0B9XraQXJYHmyZsIPWaCCvEM0Fjk/cDM5WJUw8kFT0jMOHKSAhGpF/D2zXlEz IaZVvEidainuB65U50MuAU27QWEQFksho77a9eY6wRTH0OjOlpP2At9M3J3JMvSNwHAx U4bQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9TwGwEbBD0lmf9MEJSihD2efuPSkw0cX9CyA8de1klg=; b=L8YPkRrdlJQIG6h02pDvx1mBDEXSVIeiTgswlTiyzcWYQzbxijXjE5lZRlV1pMJ/3g OH/TYIOBXeRT4Ct9OmuU5Bwcdin3+cSLNEXd6sb2pdNO1B4JS0b8OWUWx7QuIdsd0vYb 066s4ll9mWE6R0cRVv5Tb/nMmG2w5evyRFEH8IlGDdjEjaCvC6Nu/Sm0uhpJma40fH1q DQ/LtS1TSBCkXHtfQqVlyiuGpKJVBZ6xsleTVglDdszYJsTAh8+Gh5i6N0Lt6u4834FE sTzkjZ6FBWMRXilzjdi/Nf+IZvF0Au0gIqGB7IyXv0x9exSvxyjRMFAzCP9LEvhzMbQP jfGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@riseup.net header.s=squak header.b=mj6MNABw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=riseup.net Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id nb2-20020a17090b35c200b001ef7418a170si6585765pjb.183.2022.07.21.12.13.40; Thu, 21 Jul 2022 12:13:56 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@riseup.net header.s=squak header.b=mj6MNABw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=riseup.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233254AbiGUShh (ORCPT + 99 others); Thu, 21 Jul 2022 14:37:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233097AbiGUShc (ORCPT ); Thu, 21 Jul 2022 14:37:32 -0400 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6656C8C8F6 for ; Thu, 21 Jul 2022 11:37:24 -0700 (PDT) Received: from fews2.riseup.net (fews2-pn.riseup.net [10.0.1.84]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mail.riseup.net", Issuer "R3" (not verified)) by mx1.riseup.net (Postfix) with ESMTPS id 4LphBW4PfjzDqPY; Thu, 21 Jul 2022 18:37:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1658428644; bh=m2webdU4jTFpk3bYvkJ9MyFirvfbb6dE57i2ooQeyXg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mj6MNABwekeNjXBy67g8kTqco+ArYJHAv8HkYFT1QxViNtjYsTuSnlnGoi0QFsP9w MR2pYnakBnHnqjYO11tN1X5M3qptk6VpL99KIxA3Tt5P3f7RlwP3m1+/EtSxeilkiF NhTBLbog3gWf1o+GZt+r2iV599oqCXeBofDq9/ng= X-Riseup-User-ID: 1A8A9C96F21F58AEC65DA76C92EF0A3F4F6A193D717DD15885453AE7430B2AFA Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews2.riseup.net (Postfix) with ESMTPSA id 4LphBP4GGRz1yWd; Thu, 21 Jul 2022 18:37:17 +0000 (UTC) From: =?UTF-8?q?Ma=C3=ADra=20Canal?= To: Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , christian.koenig@amd.com, Xinhui.Pan@amd.com, David Airlie , Daniel Vetter , Nicholas Kazlauskas , Dmytro Laktyushkin , Aurabindo Pillai Cc: amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, mwen@igalia.com, andrealmeid@riseup.net, Isabella Basso , magalilemes00@gmail.com, tales.aparecida@gmail.com, =?UTF-8?q?Ma=C3=ADra=20Canal?= , =?UTF-8?q?Andr=C3=A9=20Almeida?= Subject: [PATCH v2 4/4] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function Date: Thu, 21 Jul 2022 15:36:33 -0300 Message-Id: <20220721183633.1004611-4-mairacanal@riseup.net> In-Reply-To: <20220721183633.1004611-1-mairacanal@riseup.net> References: <20220721183633.1004611-1-mairacanal@riseup.net> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Based on the dml30_CalculateWriteBackDISPCLK, it separates the DISPCLK calculations on three variables, making no functional changes, in order to make it more readable and better express that three values are being compared on dml_max. Signed-off-by: Maíra Canal Reviewed-by: André Almeida --- .../drm/amd/display/dc/dml/display_mode_vba.c | 29 ++++++++++++------- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c index 503e7d984ff0..df80c79d8fbc 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c @@ -1115,20 +1115,27 @@ double CalculateWriteBackDISPCLK( unsigned int HTotal, unsigned int WritebackChromaLineBufferWidth) { - double CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max( - dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio, - dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWidth / 4.0, 1) + double DISPCLK_H, DISPCLK_V, DISPCLK_HB, CalculateWriteBackDISPCLK; + + DISPCLK_H = dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio; + DISPCLK_V = (WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWidth / 4.0, 1) + dml_ceil(WritebackDestinationWidth / 4.0, 1)) / (double) HTotal + dml_ceil(1.0 / WritebackVRatio, 1) - * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) / (double) HTotal, - dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal)); + * (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) / (double) HTotal; + DISPCLK_HB = dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal; + + CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB); + if (WritebackPixelFormat != dm_444_32) { - CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK, 1.01 * PixelClock * dml_max( - dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 * WritebackHRatio), - dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) * dml_ceil(WritebackDestinationWidth / 2.0 / 2.0, 1) - + dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal - + dml_ceil(1 / (2 * WritebackVRatio), 1) * (dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal, - dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal))); + DISPCLK_H = dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 * WritebackHRatio); + DISPCLK_V = (WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) * + dml_ceil(WritebackDestinationWidth / 4.0, 1) + + dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal + + dml_ceil(1 / (2 * WritebackVRatio), 1) *(dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal; + DISPCLK_HB = dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal; + CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK, + 1.01 * PixelClock * dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB)); } + return CalculateWriteBackDISPCLK; } -- 2.36.1