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Date:   Thu, 21 Jul 2022 20:22:34 -0500
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Subject: Re: [PATCH 10/10] arm64: dts: qcom: sdm845: add LLCC BWMON
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To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Konrad Dybcio <konrad.dybcio@somainline.org>,
        Georgi Djakov <djakov@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Cc:     Rajendra Nayak <quic_rjendra@quicinc.com>
References: <20220720192807.130098-1-krzysztof.kozlowski@linaro.org>
 <20220720192807.130098-11-krzysztof.kozlowski@linaro.org>
From:   Steev Klimaszewski <steev@kali.org>
In-Reply-To: <20220720192807.130098-11-krzysztof.kozlowski@linaro.org>
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Hi Krzysztof,

On 7/20/22 2:28 PM, Krzysztof Kozlowski wrote:
> The SDM845 comes with few instances of Bandwidth Monitor.  The already
> supported one monitors traffic between CPU and Last Level Cache
> Controller (LLCC) and in downstream sources is called BWMON v4 (or v4 of
> register layout).
>
> SDM845 also has also BWMON instance measuring traffic between LLCC and
> memory with different register layout: called v5.
>
> Cc: Rajendra Nayak <quic_rjendra@quicinc.com>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>   arch/arm64/boot/dts/qcom/sdm845.dtsi | 37 ++++++++++++++++++++++++++++
>   1 file changed, 37 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index fe14f7e7523b..4aab464e2bd6 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -2053,6 +2053,43 @@ llcc: system-cache-controller@1100000 {
>   			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
>   		};
>   
> +		pmu@114a000 {
> +			compatible = "qcom,sdm845-llcc-bwmon";
> +			reg = <0 0x0114a000 0 0x1000>;
> +			interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
> +			interconnects = <&mem_noc MASTER_LLCC 3 &mem_noc SLAVE_EBI1 3>;
> +
> +			operating-points-v2 = <&llcc_bwmon_opp_table>;
> +
> +			llcc_bwmon_opp_table: opp-table {
> +				compatible = "operating-points-v2";
> +
> +				/*
> +				 * The interconnect path bandwidth taken from
> +				 * cpu4_opp_table bandwidth for gladiator_noc-mem_noc
> +				 * interconnect.  This also matches the
> +				 * bandwidth table of qcom,llccbw (qcom,bw-tbl,
> +				 * bus width: 4 bytes) from msm-4.9 downstream
> +				 * kernel.
> +				 */
> +				opp-0 {
> +					opp-peak-kBps = <800000>;
> +				};
> +				opp-1 {
> +					opp-peak-kBps = <1804000>;
> +				};
> +				opp-2 {
> +					opp-peak-kBps = <3072000>;
> +				};
> +				opp-3 {
> +					opp-peak-kBps = <5412000>;
> +				};
> +				opp-4 {
> +					opp-peak-kBps = <7216000>;
> +				};
> +			};
> +		};
> +
>   		pmu@1436400 {
>   			compatible = "qcom,sdm845-bwmon", "qcom,msm8998-bwmon";
>   			reg = <0 0x01436400 0 0x600>;


With this series applied, testing on a Lenovo Yoga C630, which has an 
SDM850, I see the following:

[    3.673660] qcom-bwmon 114a000.pmu: can't request region for resource 
[mem 0x0114a000-0x0114afff]
[    3.673673] qcom-bwmon 114a000.pmu: error -EBUSY: failed to map bwmon 
registers
[    3.673678] qcom-bwmon: probe of 114a000.pmu failed with error -16