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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h11-20020a056402280b00b0043bb917b3fesi6504405ede.243.2022.07.22.02.59.03; Fri, 22 Jul 2022 02:59:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Cxo8gruR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234405AbiGVJtD (ORCPT + 99 others); Fri, 22 Jul 2022 05:49:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49328 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236047AbiGVJso (ORCPT ); Fri, 22 Jul 2022 05:48:44 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E12C79F05E for ; Fri, 22 Jul 2022 02:45:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1658483159; x=1690019159; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=sYUmQrbm0Jo3tvS0KREIf1cEPW+JlMwcqzzX7TywFLQ=; b=Cxo8gruR9SSv/ApZHsor6E/tySlFhLmLzY2cCmR411pKU4Gjr6fVC1ck +dWEbJOaRar36Trm3sNu61VMDWLZX/FHR8+nuVL/1Bp8vPFxU0oySipVJ FExBDwuNULbCofqCN3sgV8zoWEe5/ePe2NuNOtgfTzWQHAzGaHMAYvYVH 7u9w3gDfAHU6BEfGe8m5NogXiwpuNyE+7XOf9G9dvvkVoi/8EVrcLryjK MiQ3vvFZY2f0txZBmGCPp/qGy32dZoT20ZNMwwX85gutAG6Z7W09VUyX+ QHDt5rtH9ThlNZILD6GgQG/OdKOu0vtWLaRna2F4vysBL8s/J3wJ/oyJy A==; X-IronPort-AV: E=McAfee;i="6400,9594,10415"; a="373577911" X-IronPort-AV: E=Sophos;i="5.93,185,1654585200"; d="scan'208";a="373577911" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2022 02:45:59 -0700 X-IronPort-AV: E=Sophos;i="5.93,185,1654585200"; d="scan'208";a="549116872" Received: from rdolan-mobl.ger.corp.intel.com (HELO [10.213.216.165]) ([10.213.216.165]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2022 02:45:56 -0700 Message-ID: Date: Fri, 22 Jul 2022 10:45:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH] drm/i915: stop using swiotlb Content-Language: en-US To: Robert Beckett , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Daniel Vetter Cc: kernel@collabora.com, Christoph Hellwig , Thomas Hellstrom , Matthew Auld , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20220721174307.1085741-1-bob.beckett@collabora.com> From: Tvrtko Ursulin Organization: Intel Corporation UK Plc In-Reply-To: <20220721174307.1085741-1-bob.beckett@collabora.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HK_RANDOM_ENVFROM,HK_RANDOM_FROM, NICE_REPLY_A,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/07/2022 18:43, Robert Beckett wrote: > Calling swiotlb functions directly is nowadays considered harmful. See > https://lore.kernel.org/intel-gfx/20220711082614.GA29487@lst.de/ > > Replace swiotlb_max_segment() calls with dma_max_mapping_size(). > In i915_gem_object_get_pages_internal() no longer consider max_segment > only if CONFIG_SWIOTLB is enabled. There can be other (iommu related) > causes of specific max segment sizes. > > Cc: Christoph Hellwig > Cc: Tvrtko Ursulin > Cc: Thomas Hellstrom > Cc: Matthew Auld > > Signed-off-by: Robert Beckett > --- > drivers/gpu/drm/i915/gem/i915_gem_internal.c | 20 +++++--------------- > drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 2 +- > drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 4 ++-- > drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 2 +- > drivers/gpu/drm/i915/i915_scatterlist.h | 16 ---------------- > 5 files changed, 9 insertions(+), 35 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c b/drivers/gpu/drm/i915/gem/i915_gem_internal.c > index c698f95af15f..e1aca378d90f 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c > @@ -6,7 +6,6 @@ > > #include > #include > -#include > > #include "i915_drv.h" > #include "i915_gem.h" > @@ -38,22 +37,13 @@ static int i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj) > struct scatterlist *sg; > unsigned int sg_page_sizes; > unsigned int npages; > - int max_order; > + int max_order = MAX_ORDER; > + size_t max_segment; > gfp_t gfp; > > - max_order = MAX_ORDER; > -#ifdef CONFIG_SWIOTLB > - if (is_swiotlb_active(obj->base.dev->dev)) { > - unsigned int max_segment; > - > - max_segment = swiotlb_max_segment(); > - if (max_segment) { > - max_segment = max_t(unsigned int, max_segment, > - PAGE_SIZE) >> PAGE_SHIFT; > - max_order = min(max_order, ilog2(max_segment)); > - } > - } > -#endif > + max_segment = dma_max_mapping_size(i915->drm.dev); > + max_segment = max_t(size_t, max_segment, PAGE_SIZE) >> PAGE_SHIFT; > + max_order = min(max_order, ilog2(max_segment)); > > gfp = GFP_KERNEL | __GFP_HIGHMEM | __GFP_RECLAIMABLE; > if (IS_I965GM(i915) || IS_I965G(i915)) { > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c > index 4eed3dd90ba8..b0ec65b7c1da 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c > @@ -194,7 +194,7 @@ static int shmem_get_pages(struct drm_i915_gem_object *obj) > struct intel_memory_region *mem = obj->mm.region; > struct address_space *mapping = obj->base.filp->f_mapping; > const unsigned long page_count = obj->base.size / PAGE_SIZE; > - unsigned int max_segment = i915_sg_segment_size(); > + unsigned int max_segment = dma_max_mapping_size(i915->drm.dev); > struct sg_table *st; > struct sgt_iter sgt_iter; > struct page *page; > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c > index 5a5cf332d8a5..882f046f4d18 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c > @@ -189,7 +189,7 @@ static int i915_ttm_tt_shmem_populate(struct ttm_device *bdev, > struct drm_i915_private *i915 = container_of(bdev, typeof(*i915), bdev); > struct intel_memory_region *mr = i915->mm.regions[INTEL_MEMORY_SYSTEM]; > struct i915_ttm_tt *i915_tt = container_of(ttm, typeof(*i915_tt), ttm); > - const unsigned int max_segment = i915_sg_segment_size(); > + const unsigned int max_segment = dma_max_mapping_size(i915->drm.dev); > const size_t size = (size_t)ttm->num_pages << PAGE_SHIFT; > struct file *filp = i915_tt->filp; > struct sgt_iter sgt_iter; > @@ -568,7 +568,7 @@ static struct i915_refct_sgt *i915_ttm_tt_get_st(struct ttm_tt *ttm) > ret = sg_alloc_table_from_pages_segment(st, > ttm->pages, ttm->num_pages, > 0, (unsigned long)ttm->num_pages << PAGE_SHIFT, > - i915_sg_segment_size(), GFP_KERNEL); > + dma_max_mapping_size(i915_tt->dev), GFP_KERNEL); > if (ret) { > st->sgl = NULL; > return ERR_PTR(ret); > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c > index 094f06b4ce33..8a62a71859e6 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c > @@ -129,7 +129,7 @@ static void i915_gem_object_userptr_drop_ref(struct drm_i915_gem_object *obj) > static int i915_gem_userptr_get_pages(struct drm_i915_gem_object *obj) > { > const unsigned long num_pages = obj->base.size >> PAGE_SHIFT; > - unsigned int max_segment = i915_sg_segment_size(); > + unsigned int max_segment = dma_max_mapping_size(obj->base.dev->dev); > struct sg_table *st; > unsigned int sg_page_sizes; > struct page **pvec; > diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h b/drivers/gpu/drm/i915/i915_scatterlist.h > index 9ddb3e743a3e..c9a61b51e99d 100644 > --- a/drivers/gpu/drm/i915/i915_scatterlist.h > +++ b/drivers/gpu/drm/i915/i915_scatterlist.h > @@ -9,7 +9,6 @@ > > #include > #include > -#include > > #include "i915_gem.h" > > @@ -127,21 +126,6 @@ static inline unsigned int i915_sg_dma_sizes(struct scatterlist *sg) > return page_sizes; > } > > -static inline unsigned int i915_sg_segment_size(void) > -{ > - unsigned int size = swiotlb_max_segment(); > - > - if (size == 0) > - size = UINT_MAX; On a more detailed look, there was a CI failure which makes me think this cap might need to stay. Because max sg segment is unsigned int. So I wonder if sg contstruction overflows without it. If this quick analysis is right, you could leave i915_sg_segment_size helper and cap the return from dma_max_mapping_size to UINT_MAX in it. Regards, Tvrtko *) https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-tglb2/igt@gem_mmap_offset@clear.html > - > - size = rounddown(size, PAGE_SIZE); > - /* swiotlb_max_segment_size can return 1 byte when it means one page. */ > - if (size < PAGE_SIZE) > - size = PAGE_SIZE; > - > - return size; > -} > - > bool i915_sg_trim(struct sg_table *orig_st); > > /**