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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q6-20020a170902bd8600b0016c5017ada7si9949191pls.373.2022.07.24.01.54.19; Sun, 24 Jul 2022 01:54:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=KUm6NSa+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230282AbiGXIZM (ORCPT + 99 others); Sun, 24 Jul 2022 04:25:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230111AbiGXIZI (ORCPT ); Sun, 24 Jul 2022 04:25:08 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29F1FBF for ; Sun, 24 Jul 2022 01:25:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1658651105; x=1690187105; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uMbS6YCgaFCc5kY1pSOVxfKInIMjlqBc3MsIOFJ4wOU=; b=KUm6NSa+VdILU8p2KJ5chh8lrNwPq4ExVzIxZBXMlzjyZb8iaVo73ugs aAMJ7/Y1sNAsdjsRjne9U21wYzN/f9Ic0fldmAw9QopV/A5t7HZwMvTqn Dxrd8NGdoeSIfbO2Xaj2iaQ73kLz/fw4ZVtDwKklz7/LXczTX+jh/d3je y46XXNp1K0Uu9KVpNHkZCWYnyH4Qb/AiZ14lPmKxTaiCkE6moxlvVgVR6 NtI4SzQ/bVpk4/drilnqGDNN8knaVl8Y8zazwudR/PvbdvfNTngObc5D6 3DyTUTvtGVs3tHj3CxupRMTa8CQnt5+liLYXERmKMsdCW50nGFC8C499y Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10417"; a="313267963" X-IronPort-AV: E=Sophos;i="5.93,190,1654585200"; d="scan'208";a="313267963" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jul 2022 01:24:59 -0700 X-IronPort-AV: E=Sophos;i="5.93,190,1654585200"; d="scan'208";a="657756223" Received: from twinkler-lnx.jer.intel.com ([10.12.87.143]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jul 2022 01:24:56 -0700 From: Tomas Winkler To: Greg Kroah-Hartman , David Airlie , Daniel Vetter Cc: Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, Tomas Winkler , Alexander Usyskin , Vitaly Lubart , Daniele Ceraolo Spurio Subject: [PATCH v6 03/14] drm/i915/gsc: add slow_fw flag to the gsc device definition Date: Sun, 24 Jul 2022 11:24:17 +0300 Message-Id: <20220724082428.218628-4-tomas.winkler@intel.com> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220724082428.218628-1-tomas.winkler@intel.com> References: <20220724082428.218628-1-tomas.winkler@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alexander Usyskin Add slow_fw flag to the gsc device definition and pass it to mei auxiliary device. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler Reviewed-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/gt/intel_gsc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c b/drivers/gpu/drm/i915/gt/intel_gsc.c index e0236ff1d072..f963c220bbff 100644 --- a/drivers/gpu/drm/i915/gt/intel_gsc.c +++ b/drivers/gpu/drm/i915/gt/intel_gsc.c @@ -41,6 +41,7 @@ struct gsc_def { unsigned long bar; size_t bar_size; bool use_polling; + bool slow_fw; }; /* gsc resources and definitions (HECI1 and HECI2) */ @@ -145,6 +146,7 @@ static void gsc_init_one(struct drm_i915_private *i915, adev->bar.end = adev->bar.start + def->bar_size - 1; adev->bar.flags = IORESOURCE_MEM; adev->bar.desc = IORES_DESC_NONE; + adev->slow_fw = def->slow_fw; aux_dev = &adev->aux_dev; aux_dev->name = def->name; -- 2.35.3