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Donenfeld" Cc: kernel test robot , "Justin M. Forbes" , llvm@lists.linux.dev, kbuild-all@lists.01.org, Linux Kernel Mailing List , Greg Kroah-Hartman , "Jason A. Donenfeld" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 25 Jul 2022 at 00:40, Jason A. Donenfeld wrote: > > Hi Ard, > > On Mon, Jul 25, 2022 at 04:14:48AM +0800, kernel test robot wrote: > > All warnings (new ones prefixed by >>): > > > > >> arch/arm/lib/xor-neon.c:30:2: warning: This code requires at least v= ersion 4.6 of GCC [-W#warnings] > > #warning This code requires at least version 4.6 of GCC > > ^ > > 1 warning generated. > > > > > > vim +30 arch/arm/lib/xor-neon.c > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 16 > > 01956597cbc46d Ard Biesheuvel 2013-05-17 17 /* > > 01956597cbc46d Ard Biesheuvel 2013-05-17 18 * Pull in the reference = implementations while instructing GCC (through > > 01956597cbc46d Ard Biesheuvel 2013-05-17 19 * -ftree-vectorize) to a= ttempt to exploit implicit parallelism and emit > > 01956597cbc46d Ard Biesheuvel 2013-05-17 20 * NEON instructions. > > 01956597cbc46d Ard Biesheuvel 2013-05-17 21 */ > > 01956597cbc46d Ard Biesheuvel 2013-05-17 22 #if __GNUC__ > 4 || (__GN= UC__ =3D=3D 4 && __GNUC_MINOR__ >=3D 6) > > 01956597cbc46d Ard Biesheuvel 2013-05-17 23 #pragma GCC optimize "tre= e-vectorize" > > 01956597cbc46d Ard Biesheuvel 2013-05-17 24 #else > > 01956597cbc46d Ard Biesheuvel 2013-05-17 25 /* > > 01956597cbc46d Ard Biesheuvel 2013-05-17 26 * While older versions o= f GCC do not generate incorrect code, they fail to > > 01956597cbc46d Ard Biesheuvel 2013-05-17 27 * recognize the parallel= nature of these functions, and emit plain ARM code, > > 01956597cbc46d Ard Biesheuvel 2013-05-17 28 * which is known to be s= lower than the optimized ARM code in asm-arm/xor.h. > > 01956597cbc46d Ard Biesheuvel 2013-05-17 29 */ > > 01956597cbc46d Ard Biesheuvel 2013-05-17 @30 #warning This code requir= es at least version 4.6 of GCC > > 01956597cbc46d Ard Biesheuvel 2013-05-17 31 #endif > > 01956597cbc46d Ard Biesheuvel 2013-05-17 32 > > Does this file need a depends on =E2=89=A54.6 thing in Kconfig? Or is som= ething > else happening here since 4.6 isn't even supported by the kernel these > days? > Hi Jason, This is explained/fixed in commit a69cb445f7d129abf7c50d48c8a8eca7c8d5df15 Author: Ard Biesheuvel Date: Sat Feb 5 16:23:46 2022 +0100 crypto: arm/xor - make vectorized C code Clang-friendly The ARM version of the accelerated XOR routines are simply the 8-way C routines passed through the auto-vectorizer with SIMD codegen enabled. This used to require GCC version 4.6 at least, but given that 5.1 is no= w the baseline, this check is no longer necessary, and actually misidentifies Clang as GCC < 4.6 as Clang defines the GCC major/minor a= s well, but makes no attempt at doing this in a way that conveys feature parity with a certain version of GCC (which would not be a great idea i= n the first place). which landed in v5.18. Note that the patch depends on its parent, which touches many different architectures, so it may not be backportable cleanly.