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X-OriginatorOrg: nokia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jul 2022 09:17:51.2628 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 74be869f-897d-4f50-b2e4-08da6e1e8c9d X-MS-Exchange-CrossTenant-Id: 5d471751-9675-428d-917b-70f44f9630b0 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5d471751-9675-428d-917b-70f44f9630b0;Ip=[131.228.2.8];Helo=[fihe3nok0734.emea.nsn-net.net] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT013.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR07MB7898 X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alexander Sverdlin This options is used to reserve a shared memory region for user processes to use for hardware memory buffers. The actual code to support the option comes in the following patch. Signed-off-by: Corey Minyard Signed-off-by: Alexander Sverdlin --- arch/mips/cavium-octeon/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig index 4984e46..c1899f1 100644 --- a/arch/mips/cavium-octeon/Kconfig +++ b/arch/mips/cavium-octeon/Kconfig @@ -67,6 +67,18 @@ config CAVIUM_OCTEON_LOCK_L2_MEMCPY help Lock the kernel's implementation of memcpy() into L2. +config CAVIUM_RESERVE32 + int "Memory to reserve for user processes shared region (MB)" + range 0 1536 + default "0" + help + Reserve a shared memory region for user processes to use for hardware + memory buffers. This is required for 32bit applications to be able to + send and receive packets directly. Applications access this memory by + memory mapping /dev/mem for the addresses in /proc/octeon_info. For + optimal performance with HugeTLBs, keep this size an even number of + megabytes. + config OCTEON_ILM tristate "Module to measure interrupt latency using Octeon CIU Timer" help -- 2.10.2