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Date:   Mon, 25 Jul 2022 16:54:16 -0500
From:   Segher Boessenkool <segher@kernel.crashing.org>
To:     Pali =?iso-8859-1?Q?Roh=E1r?= <pali@kernel.org>
Cc:     Christophe Leroy <christophe.leroy@csgroup.eu>,
        "linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: Regression: Linux v5.15+ does not boot on Freescale P2020
Message-ID: <20220725215416.GV25951@gate.crashing.org>
References: <20220722090929.mwhmxxdd7yioxqpz@pali> <6b227478-73b8-2a97-1c78-89570d928739@csgroup.eu> <20220723150702.jecerkhxhy65dgww@pali> <875yjld2oe.fsf@mpe.ellerman.id.au> <20220725125256.cg6su4d2ageylvp6@pali> <e2487668-b6d9-9ddb-1bb4-9f4d37fae1a7@csgroup.eu> <20220725201009.gwuchzswcqaxntrk@pali>
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On Mon, Jul 25, 2022 at 10:10:09PM +0200, Pali Roh?r wrote:
> On Monday 25 July 2022 16:20:49 Christophe Leroy wrote:
> Now I did again clean test with same Debian 10 cross compiler.
> 
> $ git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git && cd linux
> $ git checkout v5.15
> $ make mpc85xx_smp_defconfig ARCH=powerpc CROSS_COMPILE=powerpc-linux-gnuspe-
> $ make vmlinux ARCH=powerpc CROSS_COMPILE=powerpc-linux-gnuspe-
> $ cp -a vmlinux vmlinux.v5.15
> $ git revert 9401f4e46cf6965e23738f70e149172344a01eef
> $ make vmlinux ARCH=powerpc CROSS_COMPILE=powerpc-linux-gnuspe-
> $ cp -a vmlinux vmlinux.revert
> $ powerpc-linux-gnuspe-objdump -d vmlinux.revert > vmlinux.revert.dump
> $ powerpc-linux-gnuspe-objdump -d vmlinux.v5.15 > vmlinux.v5.15.dump
> $ diff -Naurp vmlinux.v5.15.dump vmlinux.revert.dump
> 
> And there are:
> 
> -c000c304:      7d 20 f8 29     lwarx   r9,0,r31,1
> +c000c304:      7d 20 f8 28     lwarx   r9,0,r31
> 
> I guess it must be reproducible this issue as I'm using regular
> toolchain from distribution.

The kernel had

#define PPC_RAW_LWARX(t, a, b, eh)       (0x7c000028 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | __PPC_EH(eh))

and

#define PPC_LWARX(t, a, b, eh) stringify_in_c(.long PPC_RAW_LWARX(t, a, b, eh))

and

#ifdef CONFIG_PPC64
#define __PPC_EH(eh)    (((eh) & 0x1) << 0)
#else
#define __PPC_EH(eh)    0
#endif

but Christophe's 9401f4e46cf6 changed

-"1:    " PPC_LWARX(%0,0,%2,1) "\n\
+"1:    lwarx           %0,0,%2,1\n\

no longer checking CONFIG_PPC64.  That appears to be the bug.

The EH field in larx insns is new since ISA 2.05, and some ISA 1.x cpu
implementations actually raise an illegal insn exception on EH=1.  It
appears P2020 is one of those.


Segher