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[2620:137:e000::1:20]) by mx.google.com with ESMTP id y16-20020a056402271000b0043bb8927676si16069875edd.634.2022.07.25.18.41.06; Mon, 25 Jul 2022 18:41:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237391AbiGZBi6 (ORCPT + 99 others); Mon, 25 Jul 2022 21:38:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36212 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237387AbiGZBiw (ORCPT ); Mon, 25 Jul 2022 21:38:52 -0400 Received: from szxga08-in.huawei.com (szxga08-in.huawei.com [45.249.212.255]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A55C28736; Mon, 25 Jul 2022 18:38:51 -0700 (PDT) Received: from dggemv704-chm.china.huawei.com (unknown [172.30.72.57]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4LsKHf2NCPz1M8MD; Tue, 26 Jul 2022 09:35:58 +0800 (CST) Received: from kwepemm600007.china.huawei.com (7.193.23.208) by dggemv704-chm.china.huawei.com (10.3.19.47) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Tue, 26 Jul 2022 09:38:49 +0800 Received: from [10.67.102.167] (10.67.102.167) by kwepemm600007.china.huawei.com (7.193.23.208) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Tue, 26 Jul 2022 09:38:49 +0800 Message-ID: Date: Tue, 26 Jul 2022 09:38:48 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH v2 2/7] dmaengine: hisilicon: Fix CQ head update To: Vinod Koul CC: , , References: <20220625074422.3479591-1-haijie1@huawei.com> <20220629035549.44181-1-haijie1@huawei.com> <20220629035549.44181-3-haijie1@huawei.com> From: Jie Hai In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.102.167] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To kwepemm600007.china.huawei.com (7.193.23.208) X-CFilter-Loop: Reflected X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,NICE_REPLY_A, RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022/7/21 21:27, Vinod Koul wrote: > On 29-06-22, 11:55, Jie Hai wrote: >> After completion of data transfer of one or multiple descriptors, >> the completion status and the current head pointer to submission >> queue are written into the CQ and interrupt can be generated to >> inform the software. In interrupt process CQ is read and cq_head >> is updated. >> >> hisi_dma_irq updates cq_head only when the completion status is >> success. When an abnormal interrupt reports, cq_head will not update >> which will cause subsequent interrupt processes read the error CQ >> and never report the correct status. >> >> This patch updates cq_head whenever CQ is accessed. >> >> Fixes: e9f08b65250d ("dmaengine: hisilicon: Add Kunpeng DMA engine support") >> Reported-by: kernel test robot >> Signed-off-by: Jie Hai >> --- >> drivers/dma/hisi_dma.c | 10 +++++----- >> 1 file changed, 5 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/dma/hisi_dma.c b/drivers/dma/hisi_dma.c >> index 98bc488893cc..7609e6e7eb37 100644 >> --- a/drivers/dma/hisi_dma.c >> +++ b/drivers/dma/hisi_dma.c >> @@ -436,12 +436,12 @@ static irqreturn_t hisi_dma_irq(int irq, void *data) >> desc = chan->desc; >> cqe = chan->cq + chan->cq_head; >> if (desc) { >> + chan->cq_head = (chan->cq_head + 1) % >> + hdma_dev->chan_depth; > > This can look better with single line > Thanks for your reviewing. These issues have been fixed in V3. >> + hisi_dma_chan_write(hdma_dev->base, >> + HISI_DMA_CQ_HEAD_PTR, chan->qp_num, >> + chan->cq_head); > > maybe two lines? > >> if (FIELD_GET(STATUS_MASK, cqe->w0) == STATUS_SUCC) { >> - chan->cq_head = (chan->cq_head + 1) % >> - hdma_dev->chan_depth; >> - hisi_dma_chan_write(hdma_dev->base, >> - HISI_DMA_CQ_HEAD_PTR, chan->qp_num, >> - chan->cq_head); >> vchan_cookie_complete(&desc->vd); >> } else { >> dev_err(&hdma_dev->pdev->dev, "task error!\n"); >> -- >> 2.33.0 >