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From:   "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date:   Wed, 27 Jul 2022 09:30:32 +0100
Message-ID: <CA+V-a8urJWn4Ob2Xs0w7f5YHJ1Ak362cM0427e494VqGREkYPw@mail.gmail.com>
Subject: Re: [PATCH 6/6] riscv: dts: renesas: Add initial devicetree for
 Renesas RZ/Five SoC
To:     Conor.Dooley@microchip.com
Cc:     "Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        Magnus Damm <magnus.damm@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>, aou@eecs.berkeley.edu,
        anup@brainfault.org,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        linux-riscv <linux-riscv@lists.infradead.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Biju Das <biju.das.jz@bp.renesas.com>
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Hi Conor,

On Wed, Jul 27, 2022 at 9:21 AM <Conor.Dooley@microchip.com> wrote:
>
>
> On 27/07/2022 09:09, Lad, Prabhakar wrote:
> > Hi Conor,
> >
> >>
> >> Missing files? Where is your Makefile for this directory?
> >> Or the board dts?
> >>
> > My plan was to get the initial minimal SoC DTSi and then later
> > gradually add the board DTS, but it looks like I'll have to include it
> > along with this series.
> >
>
> You could still add a minimal dts & add more things to it over time I
> guess?
>
Agreed.

Cheers,
Prabhakar