Received: by 2002:ac0:e34a:0:0:0:0:0 with SMTP id g10csp489574imn; Wed, 27 Jul 2022 11:38:06 -0700 (PDT) X-Google-Smtp-Source: AGRyM1sFeJlSnJJoyKLtN4QZGH4VlZkWQ2+o1OixlGDXgaMEw7E/1L5TC1tJ7TIl9RgqZxd5QF/B X-Received: by 2002:a05:6402:4311:b0:43c:3515:bda2 with SMTP id m17-20020a056402431100b0043c3515bda2mr12128371edc.288.1658947086466; Wed, 27 Jul 2022 11:38:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1658947086; cv=none; d=google.com; s=arc-20160816; b=cmA7/AEmDd3hkXIc+arwKf6HTlWsqg526JIM99THeTiLmtwLOybRVzRF6HNclWOGU/ SZz/cmCofG9XOwCKiWBpck/0SciiVIUVnV7NOUKoU8elyKkYqdvzgRMlgz0SBSHd/eT5 hhLS3YUoZs43PXv87dNnvbpbVlDfWMGx/8yaUI8S3Qr9vOh7eq3vm4Ob1Kt2iVGImike ia2DInHNGaDNkBqb2gg8Ywz8JYkEOcTDI0iUsRFUIjpyubOMcToVIqCrRLmrJhJ4Z4aB EH9H7Q1g1m1rMMqjgwlmUiaeZIhm0ldrRGkEcZaIYXvkfNefzn4Hcfl0KW3+FphXCbAV 4s1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:subject:cc:to:from:date; bh=3JrjOvTaqGir8KtHT2bTPgs8HNsEDRbR4vNyyCZ5DhA=; b=aroTjl+w91wHjzumUXFcu/1t67CNEsq0ZXUDDXFcShjsCr0EQcH60qVg2Yud3b3lhL tP1YAg70hoimRJmkll1Lw+1amSxvyuX4Y5D8RiF+/XDXfIi2qLGuRG8DrF1Zp1ZvARKb FmUUh1IzdslWEZfmoxgtvb/gqtgLGibPAa8Aew4QCvXfeI00DOrw3A6o08kTsJzHaqMz oB7JA44rlfDk/BLy+eTDkp2zrXEtvhlfR39K6xHyGZnVZOysQs2UbfZyXG52soe7FoG5 Ook/+l7/qrN0+5d5vzF9+veeHruPxrlNu6wJtWY5yRVReIZb0B0JDDNnHz79ME/IN1Rp yxPQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u5-20020a170906950500b00720fab07981si16322228ejx.336.2022.07.27.11.37.41; Wed, 27 Jul 2022 11:38:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239323AbiG0Sg3 (ORCPT + 99 others); Wed, 27 Jul 2022 14:36:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232034AbiG0SgL (ORCPT ); Wed, 27 Jul 2022 14:36:11 -0400 Received: from mail.enpas.org (zhong.enpas.org [46.38.239.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 8C5F2820EB; Wed, 27 Jul 2022 10:33:32 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail.enpas.org (Postfix) with ESMTPSA id 456C5FFCE8; Wed, 27 Jul 2022 17:33:15 +0000 (UTC) Date: Wed, 27 Jul 2022 19:33:13 +0200 From: Max Staudt To: Dario Binacchi Cc: Marc Kleine-Budde , linux-kernel@vger.kernel.org, linux-can@vger.kernel.org, Oliver Hartkopp , michael@amarulasolutions.com, Amarula patchwork , Jeroen Hofstee , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Wolfgang Grandegger , netdev@vger.kernel.org, Vincent Mailhol Subject: Re: [RFC PATCH v3 8/9] can: slcan: add support to set bit time register (btr) Message-ID: <20220727193313.71d54ce0.max@enpas.org> In-Reply-To: References: <20220726210217.3368497-1-dario.binacchi@amarulasolutions.com> <20220726210217.3368497-9-dario.binacchi@amarulasolutions.com> <20220727113054.ffcckzlcipcxer2c@pengutronix.de> <20220727172101.iw3yiynni6feft4v@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 27 Jul 2022 19:28:45 +0200 Dario Binacchi wrote: > On Wed, Jul 27, 2022 at 7:21 PM Marc Kleine-Budde wrote: > > > > Ok - We avoided writing bit timing registers from user space into the > > hardware for all existing drivers. If there isn't a specific use case, > > let's skip this patch. If someone comes up with a use case we can think > > of a proper solution. > > Ok. So do I also remove the 7/9 "ethtool: add support to get/set CAN > bit time register" > patch ? If I may answer as well - IMHO, yes. Unless we know that BTR is something other than just a different way to express the bitrate, I'd skip it, yes. Because bitrate is already handled by other, cross-device mechanisms. Max