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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Wolfgang Grandegger , netdev@vger.kernel.org, Vincent Mailhol , Max Staudt Subject: Re: [RFC PATCH v3 8/9] can: slcan: add support to set bit time register (btr) Message-ID: <20220727172101.iw3yiynni6feft4v@pengutronix.de> References: <20220726210217.3368497-1-dario.binacchi@amarulasolutions.com> <20220726210217.3368497-9-dario.binacchi@amarulasolutions.com> <20220727113054.ffcckzlcipcxer2c@pengutronix.de> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="qb4zgbo6zcj7rdiz" Content-Disposition: inline In-Reply-To: X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: mkl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --qb4zgbo6zcj7rdiz Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 27.07.2022 17:55:10, Dario Binacchi wrote: > Hello Marc, >=20 > On Wed, Jul 27, 2022 at 1:31 PM Marc Kleine-Budde wr= ote: > > > > On 26.07.2022 23:02:16, Dario Binacchi wrote: > > > It allows to set the bit time register with tunable values. > > > The setting can only be changed if the interface is down: > > > > > > ip link set dev can0 down > > > ethtool --set-tunable can0 can-btr 0x31c > > > ip link set dev can0 up > > > > As far as I understand, setting the btr is an alternative way to set the > > bitrate, right? >=20 > I thought of a non-standard bitrate or, in addition to the bitrate, the > possibility of enabling some specific CAN controller options. Maybe Oliver > could help us come up with the right answer. >=20 > This is the the slcan source code: > https://github.com/linux-can/can-utils/blob/cad1cecf1ca19277b5f5db39f8ef6= f8ae426191d/slcand.c#L331 > btr case cames after speed but they don't seem to be considered alternati= ve. >=20 > > I don't like the idea of poking arbitrary values into a > > hardware from user space. >=20 > However this is already possible through the slcand and slcan_attach > applications. > Furthermore, the driver implements the LAWICEL ASCII protocol for CAN > frame transport over serial lines, > and this is one of the supported commands. >=20 > > > > Do you have a use case for this? >=20 > I use the applications slcand and slcan_attach as a reference, I try to m= ake the > driver independent from them for what concerns the CAN setup. And the bit= time > register setting is the last dependency. Ok - We avoided writing bit timing registers from user space into the hardware for all existing drivers. If there isn't a specific use case, let's skip this patch. If someone comes up with a use case we can think of a proper solution. Marc --=20 Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung West/Dortmund | Phone: +49-231-2826-924 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | --qb4zgbo6zcj7rdiz Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEBsvAIBsPu6mG7thcrX5LkNig010FAmLhc/oACgkQrX5LkNig 013Q0wf+OetFqVIdpnKJrgEcaRpfWuVRTy1mYAAfQqf4fWGUm34tGLcMabzW4wzi Fgv2S2BILslBLV588C1qtPNMPDP3aGZuUWR6e1NTRHKpHanNT9iVt4GZg7vphc4S LMk8hlAIVWYCMe8ORjCAmFx7bMR8X3n8S9LupuSFBXncD2PaCkMd3EMs2H5bAGis VwYwL063/10IcfSPgG59l7zQxz104wphrYoK4qDC9LH9ebfXTkuBuwkqjmSvykXM EuMsoy3KW7NLKe2tEfl31DEiPaET29Gbpo9K/NsGpPRPj/BvRRo5E9eFsybDKY+M J0/bsEjYG/WOaxmx9GjfCDA4LXlxdQ== =Yfkr -----END PGP SIGNATURE----- --qb4zgbo6zcj7rdiz--