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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Landen Chao , DENG Qingfang , Luiz Angelo Daros de Luca , Sander Vanheule , =?UTF-8?Q?Ren=c3=a9_van_Dorst?= , Daniel Golle , erkin.bozoglu@xeront.com, Sergio Paracuellos , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org References: <20220726122406.31043-1-arinc.unal@arinc9.com> From: =?UTF-8?B?QXLEsW7DpyDDnE5BTA==?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ZohoMailClient: External X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 27.07.2022 23:31, Frank Wunderlich wrote: > >> Gesendet: Dienstag, 26. Juli 2022 um 14:24 Uhr >> Von: "Arınç ÜNAL" > > Hi, > >> To Frank: >> Let me know if MII bindings for port 5 and 6 on MT7531 are okay. > > I ack krzysztof, that the change is really huge and it is hard to understand what exactly is changed and why. So please split. I have converted > it to yaml, but not have changed the logic itself. I guess you know the switch better than me. > >> Does your recent patch for MT7531 make it possible to set any port for CPU, >> including user ports? For now, I put a rule to restrict CPU ports to 5 and >> 6, as described on the description of dsa port reg property. > > i only know that port 5 and 6 are possible, not about the other ports. Afair there was a check if port 5 or 6 (followed by available modes > like rgmii, trgmii or sgmii) and then allow cpu-port-mode else allow only user-port mode. Had not changed this, so currently only these 2 > ports can be used as CPU. > >> I suppose your patch does not bring support for using MT7530's port 5 as >> CPU port. We could try this on a BPI-R2. Device schematics show that >> MT7530's GMII pins are wired to GMAC1 of MT7623NI to work as RGMII. > > my patches (and the version from Vladimir that was merged) only solves the Problem that CPU-Port was fixed to 6 before. I tested Patches on r2 > (mt7530) and r64 too (mt7531) that they do not break anything. But i have not disabled port 6 (maybe i had to do so for a port5-only mode), only > enabled port 5 too and run iperf3 over a vlan-aware bridge between wan-port and port 5. I've seen this under mt7530_setup(): The bit for MHWTRAP_P6_DIS is cleared to enable port 6 with the comment "Enable Port 6 only; P5 as GMAC5 which currently is not supported". https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/tree/drivers/net/dsa/mt7530.c#n2189 I'm slowly learning C programming so I can't currently manage to do something on my own here, just letting you know. Arınç