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From:   Frank Wunderlich <frank-w@public-files.de>
To:     =?UTF-8?Q?Ar=C4=B1n=C3=A7_=C3=9CNAL?= <arinc.unal@arinc9.com>
Cc:     Andrew Lunn <andrew@lunn.ch>,
        Vivien Didelot <vivien.didelot@gmail.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        Vladimir Oltean <olteanv@gmail.com>,
        "David S . Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Sean Wang <sean.wang@mediatek.com>,
        Landen Chao <Landen.Chao@mediatek.com>,
        DENG Qingfang <dqfext@gmail.com>,
        Luiz Angelo Daros de Luca <luizluca@gmail.com>,
        Sander Vanheule <sander@svanheule.net>,
        =?UTF-8?Q?Ren=C3=A9_van_Dorst?= <opensource@vdorst.com>,
        Daniel Golle <daniel@makrotopia.org>, erkin.bozoglu@xeront.com,
        Sergio Paracuellos <sergio.paracuellos@gmail.com>,
        netdev@vger.kernel.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
        =?UTF-8?Q?Ar=C4=B1n=C3=A7_=C3=9CNAL?= <arinc.unal@arinc9.com>
Subject: Aw: [RFC PATCH net-next] dt-bindings: net: dsa: mediatek,mt7530:
 completely rework binding
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Date:   Wed, 27 Jul 2022 22:31:13 +0200
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> Gesendet: Dienstag, 26=2E Juli 2022 um 14:24 Uhr
> Von: "Ar=C4=B1n=C3=A7 =C3=9CNAL" <arinc=2Eunal@arinc9=2Ecom>

Hi,=20

> To Frank:
> Let me know if MII bindings for port 5 and 6 on MT7531 are okay=2E

I ack krzysztof, that the change is really huge and it is hard to understa=
nd what exactly is changed and why=2E So please split=2E I have converted=
=20
it to yaml, but not have changed the logic itself=2E I guess you know the =
switch better than me=2E

> Does your recent patch for MT7531 make it possible to set any port for C=
PU,
> including user ports? For now, I put a rule to restrict CPU ports to 5 a=
nd
> 6, as described on the description of dsa port reg property=2E

i only know that port 5 and 6 are possible, not about the other ports=2E A=
fair there was a check if port 5 or 6 (followed by available modes
like rgmii, trgmii or sgmii) and then allow cpu-port-mode else allow only =
user-port mode=2E Had not changed this, so currently only these 2
ports can be used as CPU=2E

> I suppose your patch does not bring support for using MT7530's port 5 as
> CPU port=2E We could try this on a BPI-R2=2E Device schematics show that
> MT7530's GMII pins are wired to GMAC1 of MT7623NI to work as RGMII=2E

my patches (and the version from Vladimir that was merged) only solves the=
 Problem that CPU-Port was fixed to 6 before=2E I tested Patches on r2=20
(mt7530) and r64 too (mt7531) that they do not break anything=2E But i hav=
e not disabled port 6 (maybe i had to do so for a port5-only mode), only
enabled port 5 too and run iperf3 over a vlan-aware bridge between wan-por=
t and port 5=2E

> Ar=C4=B1n=C3=A7

regards Frank