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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id n186-20020a1ca4c3000000b003a2d87aea57sm4519126wme.10.2022.07.28.00.15.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jul 2022 00:15:23 -0700 (PDT) References: <20220728054202.6981-1-yu.tu@amlogic.com> User-agent: mu4e 1.8.6; emacs 27.1 From: Jerome Brunet To: Yu Tu , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Neil Armstrong , Kevin Hilman , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Martin Blumenstingl Subject: Re: [PATCH V2 0/3] Add S4 SoC clock controller driver Date: Thu, 28 Jul 2022 09:08:44 +0200 In-reply-to: <20220728054202.6981-1-yu.tu@amlogic.com> Message-ID: <1j8rodhfn9.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu 28 Jul 2022 at 13:41, Yu Tu wrote: > 1. Add clock controller driver for S4 SOC. > > Yu Tu (3): > dt-bindings: clk: meson: add S4 SoC clock controller bindings > arm64: dts: meson: add S4 Soc clock controller in DT > clk: meson: s4: add s4 SoC clock controller driver > > V1 -> V2: Change format as discussed in the email. > > Link:https://lore.kernel.org/linux-amlogic/20220708062757.3662-1-yu.tu@amlogic.com/ > > .../bindings/clock/amlogic,gxbb-clkc.txt | 1 + > MAINTAINERS | 1 + > arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 11 + > drivers/clk/meson/Kconfig | 15 + > drivers/clk/meson/Makefile | 1 + > drivers/clk/meson/s4.c | 4732 +++++++++++++++++ > drivers/clk/meson/s4.h | 296 ++ > include/dt-bindings/clock/s4-clkc.h | 146 + > 8 files changed, 5203 insertions(+) > create mode 100644 drivers/clk/meson/s4.c > create mode 100644 drivers/clk/meson/s4.h > create mode 100644 include/dt-bindings/clock/s4-clkc.h > > > base-commit: b293bc9286ee21824e93f0fcfed3b78fdfee01e6 Please don't post until you have addressed *ALL* the comments from the previous version. At first glance, I can see that this is still a single driver for what is obviously 2 controllers with 2 register spaces. Simple comments like the "<< 2" in the register declaration have not been addressed either. Seeing that, I have not reviewed this version further. I won't until all the comments from v1 are either addressed or answered. Regards Jerome