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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b12-20020aa7c90c000000b0043a90a31070si272885edt.284.2022.07.28.01.25.22; Thu, 28 Jul 2022 01:25:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=OnMF6WSR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234708AbiG1HpE (ORCPT + 99 others); Thu, 28 Jul 2022 03:45:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233440AbiG1HpD (ORCPT ); Thu, 28 Jul 2022 03:45:03 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37E1660687 for ; Thu, 28 Jul 2022 00:45:02 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C7CDA61B50 for ; Thu, 28 Jul 2022 07:45:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 36D70C433C1; Thu, 28 Jul 2022 07:45:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1658994301; bh=8wAwxJHj72HBZYIRbP52E2RJVCjjZw/lFPUg234x34E=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=OnMF6WSRoFlELzImTeG4w6aj8DsFNilwkuiHoyAECiKioWFsHHkg0KS9OyCHFYdI2 NFfulpCZDhYEhuLI6Qe5BiBjWHvPX7/IGkKMPPWO2tP33tLZWWUCfwcvjxb4+apk9q Orw3n4FOa5MgywQZwWySFDpgBXi/A3RmZEUylnkXlmglYHGIx+Oo8fI5dWAz2agBpD OmtBsQ++bOlai18NBGDNOUmfQvSMUCLqYdB+cmY9vkXOR2KVxRMuuow5yMxBn817ns FqXSTwQL40FLra9eTZX2+SpB9fdK+h2NkUDI7e/9vHroru21KZSSrwimJ3KwVLalcA gsRpcxsoBOrSg== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oGyCY-00AbRB-W0; Thu, 28 Jul 2022 08:44:59 +0100 Date: Thu, 28 Jul 2022 08:44:58 +0100 Message-ID: <87zggtwuit.wl-maz@kernel.org> From: Marc Zyngier To: Vladimir Oltean Cc: linux-kernel@vger.kernel.org, Lee Jones , Thomas Gleixner , Rasmus Villemoes , Arnd Bergmann , Hou Zhiqiang , Biwen Li , Sean Anderson Subject: Re: [PATCH v3] irqchip/ls-extirq: fix invalid wait context by avoiding to use regmap In-Reply-To: <20220727160915.3648155-1-vladimir.oltean@nxp.com> References: <20220727160915.3648155-1-vladimir.oltean@nxp.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: vladimir.oltean@nxp.com, linux-kernel@vger.kernel.org, lee.jones@linaro.org, tglx@linutronix.de, linux@rasmusvillemoes.dk, arnd@arndb.de, Zhiqiang.Hou@nxp.com, biwen.li@nxp.com, sean.anderson@seco.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 27 Jul 2022 17:09:15 +0100, Vladimir Oltean wrote: > > The irqchip->irq_set_type method is called by __irq_set_trigger() under > the desc->lock raw spinlock. > > The ls-extirq implementation, ls_extirq_irq_set_type(), uses an MMIO > regmap created by of_syscon_register(), which uses plain spinlocks > (the kind that are sleepable on RT). > > Therefore, this is an invalid locking scheme for which we get a kernel > splat stating just that ("[ BUG: Invalid wait context ]"), because the > context in which the plain spinlock may sleep is atomic due to the raw > spinlock. We need to go raw spinlocks all the way. Interesting you say that... > > Make this driver ioremap its INTPCR register on its own, and stop > relying on syscon to provide a regmap. Since the regmap we got from > syscon belonged to the parent and the newly ioremapped region belongs > just to us, the offset to the INTPCR register is now 0, because of the > address translation that takes place through the device tree. > > One complication, due to the fact that this driver uses IRQCHIP_DECLARE > rather than traditional platform devices with probe and remove methods, > is that we cannot use devres, so we need to implement a full-blown > cleanup procedure on the error path. > > Fixes: 0dcd9f872769 ("irqchip: Add support for Layerscape external interrupt lines") > Signed-off-by: Vladimir Oltean > --- > v2->v3: > - stop using regmap, do the rmw manually using function pointers for BE/LE > - adapt comment style to the subsystem > - use of_device_is_big_endian > - reword commit message > > v1->v2: > - create a separate regmap for the ls-extirq driver rather than relying > on the one provided by syscon or modifying that. > > For reference, v1 is at: > https://lore.kernel.org/lkml/20210825205041.927788-3-vladimir.oltean@nxp.com/ > and v2 is at: > https://lore.kernel.org/lkml/20220722204019.969272-1-vladimir.oltean@nxp.com/ > > For extra reviewer convenience, the ls-extirq appears in the following > SoC device trees: > https://elixir.bootlin.com/linux/v5.18.13/source/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi#L289 > https://elixir.bootlin.com/linux/v5.18.13/source/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi#L249 > https://elixir.bootlin.com/linux/v5.18.13/source/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi#L319 > https://elixir.bootlin.com/linux/v5.18.13/source/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi#L325 > https://elixir.bootlin.com/linux/v5.18.13/source/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi#L682 > https://elixir.bootlin.com/linux/v5.18.13/source/arch/arm/boot/dts/ls1021a.dtsi#L182 > > Patch tested on LX2160A and LS1021A. > > drivers/irqchip/irq-ls-extirq.c | 91 ++++++++++++++++++++++++--------- > 1 file changed, 66 insertions(+), 25 deletions(-) > > diff --git a/drivers/irqchip/irq-ls-extirq.c b/drivers/irqchip/irq-ls-extirq.c > index 853b3972dbe7..cfbbe5959c8e 100644 > --- a/drivers/irqchip/irq-ls-extirq.c > +++ b/drivers/irqchip/irq-ls-extirq.c > @@ -6,8 +6,7 @@ > #include > #include > #include > -#include > -#include > +#include > #include > > #include > @@ -16,19 +15,40 @@ > #define LS1021A_SCFGREVCR 0x200 > > struct ls_extirq_data { > - struct regmap *syscon; > - u32 intpcr; > + void __iomem *intpcr; > + u32 (*read)(void __iomem *addr); > + void (*write)(void __iomem *addr, u32 val); > bool is_ls1021a_or_ls1043a; > u32 nirq; > struct irq_fwspec map[MAXIRQ]; > }; > > +static u32 ls_extirq_read_be(void __iomem *addr) > +{ > + return ioread32be(addr); > +} > + > +static u32 ls_extirq_read(void __iomem *addr) > +{ > + return ioread32(addr); > +} > + > +static void ls_extirq_write_be(void __iomem *addr, u32 val) > +{ > + iowrite32be(val, addr); > +} > + > +static void ls_extirq_write(void __iomem *addr, u32 val) > +{ > + iowrite32(val, addr); > +} > + > static int > ls_extirq_set_type(struct irq_data *data, unsigned int type) > { > struct ls_extirq_data *priv = data->chip_data; > irq_hw_number_t hwirq = data->hwirq; > - u32 value, mask; > + u32 intpcr, value, mask; > > if (priv->is_ls1021a_or_ls1043a) > mask = 1U << (31 - hwirq); > @@ -51,7 +71,11 @@ ls_extirq_set_type(struct irq_data *data, unsigned int type) > default: > return -EINVAL; > } > - regmap_update_bits(priv->syscon, priv->intpcr, mask, value); > + > + intpcr = priv->read(priv->intpcr); > + intpcr &= ~mask; > + intpcr |= value; > + priv->write(priv->intpcr, intpcr); Which really begs a few questions: - Where is the locking gone? Sure, the warning is gone. But the driver is now broken for *all* configurations, and not only RT. Result! - Is it *really* worth it to have 4 dumb helpers that bring nothing in terms of abstraction, and two indirections for something that could equally be expressed with a conditional? M. -- Without deviation from the norm, progress is not possible.