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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c16-20020a0564021f9000b0043cf66ca11fsi1646456edc.76.2022.07.28.14.35.52; Thu, 28 Jul 2022 14:36:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=OesYrilz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232851AbiG1Vcn (ORCPT + 99 others); Thu, 28 Jul 2022 17:32:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229570AbiG1Vcm (ORCPT ); Thu, 28 Jul 2022 17:32:42 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [185.16.172.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6A09C683FB; Thu, 28 Jul 2022 14:32:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=dJwqq4OXPlmsjE2fwTHp8d7oWFSLWghbqXfczdjRCXA=; b=OesYrilz3qQq6gIUCpIbQECUFa HUlSbdRLoxJAX6ZztEq1m3qgUdfHiDfP2RGg9lEcNVQz7f/r2X3+Hu1ThbhFX9THpEs+gINiizIUa XIayyfOgK3ohOjZJ6o+pazb1MMM3cTw0ISgmCXod1c8BlrofpUOAMAt/PrI5YwAijY14=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1oHB7U-00BqMl-BN; Thu, 28 Jul 2022 23:32:36 +0200 Date: Thu, 28 Jul 2022 23:32:36 +0200 From: Andrew Lunn To: Maxime Chevallier Cc: davem@davemloft.net, Rob Herring , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com, Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Horatiu.Vultur@microchip.com, Allan.Nielsen@microchip.com, UNGLinuxDriver@microchip.com Subject: Re: [PATCH net-next 3/4] net: phy: Add helper to derive the number of ports from a phy mode Message-ID: References: <20220728145252.439201-1-maxime.chevallier@bootlin.com> <20220728145252.439201-4-maxime.chevallier@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220728145252.439201-4-maxime.chevallier@bootlin.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > +int phy_interface_num_ports(phy_interface_t interface) > +{ > + switch (interface) { > + case PHY_INTERFACE_MODE_NA: > + case PHY_INTERFACE_MODE_INTERNAL: > + return 0; I've not yet looked at how this is used. Returning 0 could have interesting effects i guess? INTERNAL clearly does have some sort of path between the MAC and the PHY, so i think 1 would be a better value. NA is less clear, it generally means Don't touch. But again, there still needs to be a path between the MAC and PHY, otherwise there would not be any to touch. Why did you pick 0? > + > + case PHY_INTERFACE_MODE_MII: > + case PHY_INTERFACE_MODE_GMII: > + case PHY_INTERFACE_MODE_TBI: > + case PHY_INTERFACE_MODE_REVMII: > + case PHY_INTERFACE_MODE_RMII: > + case PHY_INTERFACE_MODE_REVRMII: > + case PHY_INTERFACE_MODE_RGMII: > + case PHY_INTERFACE_MODE_RGMII_ID: > + case PHY_INTERFACE_MODE_RGMII_RXID: > + case PHY_INTERFACE_MODE_RGMII_TXID: > + case PHY_INTERFACE_MODE_RTBI: > + case PHY_INTERFACE_MODE_XGMII: > + case PHY_INTERFACE_MODE_XLGMII: > + case PHY_INTERFACE_MODE_MOCA: > + case PHY_INTERFACE_MODE_TRGMII: > + case PHY_INTERFACE_MODE_USXGMII: > + case PHY_INTERFACE_MODE_SGMII: > + case PHY_INTERFACE_MODE_SMII: > + case PHY_INTERFACE_MODE_1000BASEX: > + case PHY_INTERFACE_MODE_2500BASEX: > + case PHY_INTERFACE_MODE_5GBASER: > + case PHY_INTERFACE_MODE_10GBASER: > + case PHY_INTERFACE_MODE_25GBASER: > + case PHY_INTERFACE_MODE_10GKR: > + case PHY_INTERFACE_MODE_100BASEX: > + case PHY_INTERFACE_MODE_RXAUI: > + case PHY_INTERFACE_MODE_XAUI: > + return 1; > + case PHY_INTERFACE_MODE_QSGMII: > + case PHY_INTERFACE_MODE_QUSGMII: > + return 4; > + > + default: > + return 0; > + } > +} Have you tried without a default: ? I _think_ gcc will then warn about missing enum values, which will help future developers when they add further values to the enum. Andrew