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Date:   Sat, 30 Jul 2022 05:55:17 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Maxime Chevallier <maxime.chevallier@bootlin.com>
Cc:     davem@davemloft.net, Rob Herring <robh+dt@kernel.org>,
        netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com,
        Florian Fainelli <f.fainelli@gmail.com>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        linux-arm-kernel@lists.infradead.org,
        Richard Cochran <richardcochran@gmail.com>,
        Horatiu.Vultur@microchip.com, Allan.Nielsen@microchip.com,
        UNGLinuxDriver@microchip.com
Subject: Re: [PATCH net-next v3 1/4] net: phy: Introduce QUSGMII PHY mode
Message-ID: <YuSrpbUrcZh5QotE@lunn.ch>
References: <20220729153356.581444-1-maxime.chevallier@bootlin.com>
 <20220729153356.581444-2-maxime.chevallier@bootlin.com>
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On Fri, Jul 29, 2022 at 05:33:53PM +0200, Maxime Chevallier wrote:
> The QUSGMII mode is a derivative of Cisco's USXGMII standard. This
> standard is pretty similar to SGMII, but allows for faster speeds, and
> has the build-in bits for Quad and Octa variants (like QSGMII).
> 
> The main difference with SGMII/QSGMII is that USXGMII/QUSGMII re-uses
> the preamble to carry various information, named 'Extensions'.
> 
> As of today, the USXGMII standard only mentions the "PCH" extension,
> which is used to convey timestamps, allowing in-band signaling of PTP
> timestamps without having to modify the frame itself.
> 
> This commit adds support for that mode. When no extension is in use, it
> behaves exactly like QSGMII, although it's not compatible with QSGMII.
> 
> Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew