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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b6-20020a655786000000b004160306e040si7031147pgr.241.2022.07.30.03.00.18; Sat, 30 Jul 2022 03:00:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=hNWtlncU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231331AbiG3JlY (ORCPT + 99 others); Sat, 30 Jul 2022 05:41:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236410AbiG3JlQ (ORCPT ); Sat, 30 Jul 2022 05:41:16 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D702A13DC3; Sat, 30 Jul 2022 02:41:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1659174071; x=1690710071; h=from:to:cc:subject:date:message-id:mime-version; bh=Yx6mdlgxUKcuMUJpG9RAXbgHUuz7QAS+XXKWOccu2sE=; b=hNWtlncU8oYvXUmhkoSDGPGQHpppEpTqHyM7v2H64v1cRk+jk2NO9iB/ zNXtHFDQxCD6Zsd+6gNlBIZr/N6EPGT2C2N1wvJow6AS37Q3W0DmJC7Lc BoyGee89DFzuUbyAguBMJs34EvkyZ0he9MK3CELHNashiPqxi3AwpsKLB M=; Received: from unknown (HELO ironmsg04-sd.qualcomm.com) ([10.53.140.144]) by alexa-out-sd-01.qualcomm.com with ESMTP; 30 Jul 2022 02:41:11 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg04-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jul 2022 02:41:10 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Sat, 30 Jul 2022 02:41:10 -0700 Received: from hyd-lnxbld559.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Sat, 30 Jul 2022 02:41:03 -0700 From: Akhil P Oommen To: freedreno , , , Rob Clark , Bjorn Andersson CC: Jordan Crouse , Jonathan Marek , Douglas Anderson , "Matthias Kaehlcke" , Akhil P Oommen , Abhinav Kumar , AngeloGioacchino Del Regno , Chia-I Wu , Dan Carpenter , Daniel Vetter , David Airlie , Dmitry Baryshkov , Nathan Chancellor , "Philipp Zabel" , Sean Paul , Stephen Boyd , Vladimir Lypak , Wang Qing , Subject: [PATCH v3 0/8] Improve GPU Recovery Date: Sat, 30 Jul 2022 15:10:43 +0530 Message-ID: <1659174051-27816-1-git-send-email-quic_akhilpo@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Recently, I debugged a few device crashes which occured during recovery after a hangcheck timeout. It looks like there are a few things we can do to improve our chance at a successful gpu recovery. First one is to ensure that CX GDSC collapses which clears the internal states in gpu's CX domain. First 5 patches tries to handle this. Rest of the patches are to ensure that few internal blocks like CP, GMU and GBIF are halted properly before proceeding for a snapshot followed by recovery. Also, handle 'prepare slumber' hfi failure correctly. These are A6x specific improvements. This series is rebased on top of [1] which based on linus's master branch. [1] https://patchwork.freedesktop.org/series/106860/ Changes in v3: - Use reset interface from gpucc driver to poll for cx gdsc collapse https://patchwork.freedesktop.org/series/106860/ - Use single pm refcount for all active submits Changes in v2: - Rebased on msm-next tip Akhil P Oommen (8): drm/msm: Remove unnecessary pm_runtime_get/put drm/msm: Take single rpm refcount on behalf of all submits drm/msm: Correct pm_runtime votes in recover worker drm/msm: Fix cx collapse issue during recovery drm/msm/a6xx: Ensure CX collapse during gpu recovery drm/msm/adreno: Remove a WARN() during runtime_suspend drm/msm/a6xx: Improve gpu recovery sequence drm/msm/a6xx: Handle GMU prepare-slumber hfi failure drivers/gpu/drm/msm/adreno/a6xx.xml.h | 4 ++ drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 83 +++++++++++++++++++----------- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 35 +++++++++++-- drivers/gpu/drm/msm/adreno/adreno_device.c | 7 --- drivers/gpu/drm/msm/msm_gpu.c | 21 +++++--- drivers/gpu/drm/msm/msm_gpu.h | 4 ++ drivers/gpu/drm/msm/msm_ringbuffer.c | 4 -- 7 files changed, 106 insertions(+), 52 deletions(-) -- 2.7.4