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[34.168.104.7]) by smtp.gmail.com with ESMTPSA id l5-20020a170903120500b0016d62ba5665sm10396763plh.254.2022.08.01.16.27.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Aug 2022 16:27:55 -0700 (PDT) Date: Mon, 1 Aug 2022 23:27:52 +0000 From: Sean Christopherson To: David Matlack Cc: isaku.yamahata@intel.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sagi Shahar Subject: Re: [RFC PATCH v6 036/104] KVM: x86/mmu: Explicitly check for MMIO spte in fast page fault Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-17.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, USER_IN_DEF_DKIM_WL,USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 01, 2022, David Matlack wrote: > On Thu, May 05, 2022 at 11:14:30AM -0700, isaku.yamahata@intel.com wrote: > > From: Sean Christopherson > > > > Explicitly check for an MMIO spte in the fast page fault flow. TDX will > > use a not-present entry for MMIO sptes, which can be mistaken for an > > access-tracked spte since both have SPTE_SPECIAL_MASK set. > > > > MMIO sptes are handled in handle_mmio_page_fault for non-TDX VMs, so this > > patch does not affect them. TDX will handle MMIO emulation through a > > hypercall instead. > > > > Signed-off-by: Sean Christopherson > > Signed-off-by: Isaku Yamahata > > --- > > arch/x86/kvm/mmu/mmu.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > > index d1c37295bb6e..4a12d862bbb6 100644 > > --- a/arch/x86/kvm/mmu/mmu.c > > +++ b/arch/x86/kvm/mmu/mmu.c > > @@ -3184,7 +3184,7 @@ static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) > > else > > sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte); > > > > - if (!is_shadow_present_pte(spte)) > > + if (!is_shadow_present_pte(spte) || is_mmio_spte(spte)) > > I wonder if this patch is really necessary. is_shadow_present_pte() > checks if SPTE_MMU_PRESENT_MASK is set (which is bit 11, not > shadow_present_mask). Do TDX VMs set bit 11 in MMIO SPTEs? This patch should be unnecessary, TDX's not-present SPTEs was one of my motivations for adding MMU_PRESENT. Bit 11 most definitely must not be set for MMIO SPTEs.