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In-Reply-To: <34ae275e-8d4c-3735-c08c-4769caf2909c@linaro.org>
From:   Rob Clark <robdclark@gmail.com>
Date:   Tue, 2 Aug 2022 11:32:50 -0700
Message-ID: <CAF6AEGv_cgPtaFpxSPCzWXeBcJvqE2fGucriRvMAJMbQ7ULndQ@mail.gmail.com>
Subject: Re: [PATCH 0/5] clk/qcom: Support gdsc collapse polling using 'reset' inteface
To:     Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc:     Akhil P Oommen <quic_akhilpo@quicinc.com>,
        freedreno <freedreno@lists.freedesktop.org>,
        dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Stephen Boyd <swboyd@chromium.org>,
        Douglas Anderson <dianders@chromium.org>,
        Andy Gross <agross@kernel.org>,
        Konrad Dybcio <konrad.dybcio@somainline.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Stephen Boyd <sboyd@kernel.org>, devicetree@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
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On Tue, Aug 2, 2022 at 12:02 AM Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> wrote:
>
> On 30/07/2022 12:17, Akhil P Oommen wrote:
> >
> > Some clients like adreno gpu driver would like to ensure that its gdsc
> > is collapsed at hardware during a gpu reset sequence. This is because it
> > has a votable gdsc which could be ON due to a vote from another subsystem
> > like tz, hyp etc or due to an internal hardware signal.
>
> If this is votable, do we have any guarantee that the gdsc will collapse
> at all? How can we proceed if it did not collapse?

Other potential votes should be transient.  But I guess we eventually
need to timeout and give up.  At which point we are no worse off than
before.

But hmm, we aren't using RBBM_SW_RESET_CMD for sw reset like we have
on previous generations?  That does seem a bit odd.  Looks like kgsl
does use it.

BR,
-R

> > To allow
> > this, gpucc driver can expose an interface to the client driver using
> > reset framework. Using this the client driver can trigger a polling within
> > the gdsc driver.
>
> Trigger the polling made me think initially that we will actually
> trigger something in the HW. Instead the client uses reset framework to
> poll for the gdsc to be reset.
>
> >
> > This series is rebased on top of linus's master branch.
> >
> > Related discussion: https://patchwork.freedesktop.org/patch/493144/
> >
> >
> > Akhil P Oommen (5):
> >    dt-bindings: clk: qcom: Support gpu cx gdsc reset
> >    clk: qcom: Allow custom reset ops
> >    clk: qcom: gpucc-sc7280: Add cx collapse reset support
> >    clk: qcom: gdsc: Add a reset op to poll gdsc collapse
> >    arm64: dts: qcom: sc7280: Add Reset support for gpu
> >
> >   arch/arm64/boot/dts/qcom/sc7280.dtsi          |  3 +++
> >   drivers/clk/qcom/gdsc.c                       | 23 +++++++++++++++++++----
> >   drivers/clk/qcom/gdsc.h                       |  7 +++++++
> >   drivers/clk/qcom/gpucc-sc7280.c               |  6 ++++++
> >   drivers/clk/qcom/reset.c                      |  6 ++++++
> >   drivers/clk/qcom/reset.h                      |  2 ++
> >   include/dt-bindings/clock/qcom,gpucc-sc7280.h |  3 +++
> >   7 files changed, 46 insertions(+), 4 deletions(-)
> >
>
>
> --
> With best wishes
> Dmitry